| .. |
|
netlist.h
|
Don't strip extensions twice in BOM export
|
2022-01-05 11:07:49 -08:00 |
|
netlist_exporter_base.cpp
|
Sort sim model pins by symbol pin number in sim model dialog
|
2022-08-26 04:36:48 +02:00 |
|
netlist_exporter_base.h
|
Fix netlist error when editing schematic symbols in place.
|
2021-07-30 18:37:45 -04:00 |
|
netlist_exporter_cadstar.cpp
|
Performance improvements.
|
2022-08-03 11:59:42 +01:00 |
|
netlist_exporter_cadstar.h
|
Schematic netlist exporter header housekeeping.
|
2021-03-22 07:59:54 -04:00 |
|
netlist_exporter_kicad.cpp
|
More NULL expunging.
|
2021-07-16 16:13:41 -04:00 |
|
netlist_exporter_kicad.h
|
Resolve text variables in eeschema before passing to pcbnew.
|
2022-01-15 01:30:03 +00:00 |
|
netlist_exporter_orcadpcb2.cpp
|
orcadpcb2 netlist export: fix an issue with duplicated pins in multi-unit symbols.
|
2022-09-07 17:13:04 +02:00 |
|
netlist_exporter_orcadpcb2.h
|
Schematic netlist exporter header housekeeping.
|
2021-03-22 07:59:54 -04:00 |
|
netlist_exporter_spice.cpp
|
Use the PEGTL grammar for detecting .control and .subckt text directives
|
2022-08-30 17:27:58 +02:00 |
|
netlist_exporter_spice.h
|
Allow mapping sim model pins to arbitrary string symbol pin numbers
|
2022-08-22 08:13:26 +02:00 |
|
netlist_exporter_xml.cpp
|
Eeschema, slash in power pin name: better fix than commit ba7a06f5.
|
2022-08-10 11:00:19 +02:00 |
|
netlist_exporter_xml.h
|
Don't put "exclude from board" symbols in CvPCB netlist.
|
2021-12-10 23:00:50 +00:00 |
|
netlist_generator.cpp
|
Sim: Spice netlist exporter rewrite
|
2022-07-30 02:25:34 +00:00 |
8b96e6fa44