79 lines
2.9 KiB
C++
79 lines
2.9 KiB
C++
/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2009 SoftPLC Corporation, Dick Hollenbeck <dick@softplc.com>
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* Copyright (C) 2009 Jean-Pierre Charras, jean-pierre.charras@inpg.fr
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* Copyright (C) 2009-2022 KiCad Developers, see change_log.txt for contributors.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include <netclass.h>
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#include <macros.h>
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#include <base_units.h>
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// This will get mapped to "kicad_default" in the specctra_export.
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const char NETCLASS::Default[] = "Default";
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// Initial values for netclass initialization
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const int DEFAULT_CLEARANCE = PcbMm2iu( 0.2 ); // track to track and track to pads clearance
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const int DEFAULT_VIA_DIAMETER = PcbMm2iu( 0.8 );
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const int DEFAULT_VIA_DRILL = PcbMm2iu( 0.4 );
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const int DEFAULT_UVIA_DIAMETER = PcbMm2iu( 0.3 );
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const int DEFAULT_UVIA_DRILL = PcbMm2iu( 0.1 );
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const int DEFAULT_TRACK_WIDTH = PcbMm2iu( 0.25 );
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const int DEFAULT_DIFF_PAIR_WIDTH = PcbMm2iu( 0.2 );
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const int DEFAULT_DIFF_PAIR_GAP = PcbMm2iu( 0.25 );
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const int DEFAULT_DIFF_PAIR_VIAGAP = PcbMm2iu( 0.25 );
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const int DEFAULT_WIRE_WIDTH = SchMils2iu( 6 );
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const int DEFAULT_BUS_WIDTH = SchMils2iu( 12 );
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const int DEFAULT_LINE_STYLE = 0; // solid
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NETCLASS::NETCLASS( const wxString& aName ) :
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m_Name( aName ),
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m_PcbColor( KIGFX::COLOR4D::UNSPECIFIED )
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{
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// Default settings
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SetClearance( DEFAULT_CLEARANCE );
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SetViaDrill( DEFAULT_VIA_DRILL );
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SetuViaDrill( DEFAULT_UVIA_DRILL );
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// These defaults will be overwritten by SetParams,
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// from the board design parameters, later
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SetTrackWidth( DEFAULT_TRACK_WIDTH );
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SetViaDiameter( DEFAULT_VIA_DIAMETER );
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SetuViaDiameter( DEFAULT_UVIA_DIAMETER );
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SetDiffPairWidth( DEFAULT_DIFF_PAIR_WIDTH );
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SetDiffPairGap( DEFAULT_DIFF_PAIR_GAP );
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SetDiffPairViaGap( DEFAULT_DIFF_PAIR_VIAGAP );
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SetWireWidth( DEFAULT_WIRE_WIDTH );
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SetBusWidth( DEFAULT_BUS_WIDTH );
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SetSchematicColor( COLOR4D::UNSPECIFIED );
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SetLineStyle( DEFAULT_LINE_STYLE );
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}
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NETCLASS::~NETCLASS()
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{
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}
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