kicad/qa/tests/pcbnew
Seth Hillbrand 96a34e5b57 Consolidate Maximum clearance calculation
We were calculating the same thing in three locations and we missed
adding the clearance from the footprints in, resulting in bad fills and
missed drc errors (see QA addition)
2023-07-26 12:55:48 -07:00
..
drc Consolidate Maximum clearance calculation 2023-07-26 12:55:48 -07:00
plugins Add basic QA test to CADSTAR PCB footprint import 2023-05-29 23:29:28 +02:00
CMakeLists.txt Add DRC testing for copper graphic to zone fill collisions. 2023-06-30 14:04:20 +01:00
group_saveload.cpp
test_array_pad_name_provider.cpp
test_board_item.cpp PCB_FIELD: bug fixes 2023-06-20 18:34:52 +00:00
test_graphics_import_mgr.cpp
test_libeval_compiler.cpp
test_lset.cpp
test_module.cpp
test_pad_numbering.cpp
test_pns_basics.cpp Coverity warning fixes. 2023-06-03 07:28:17 -04:00
test_save_load.cpp
test_tracks_cleaner.cpp QA test: disable a DRC test that generate a wxWidgets exception, 2023-07-23 16:02:50 +02:00
test_zone_filler.cpp Consolidate Maximum clearance calculation 2023-07-26 12:55:48 -07:00