Seth Hillbrand 2451cbddec Consolidate Maximum clearance calculation ... We were calculating the same thing in three locations and we missed adding the clearance from the footprints in, resulting in bad fills and missed drc errors (see QA addition) (cherry picked from commit 96a34e5b57)		2023-07-26 13:16:32 -07:00
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dblib	Move to explicit symbol properties mapping	2022-11-08 22:19:08 -05:00
eeschema	Connectivity: Correct alias-based bus resolution	2023-06-02 14:25:26 -07:00
pcbnew	Consolidate Maximum clearance calculation	2023-07-26 13:16:32 -07:00