151 lines
4.4 KiB
C++
151 lines
4.4 KiB
C++
/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2016 CERN
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* Copyright (C) 2017-2021 KiCad Developers, see AUTHORS.txt for contributors.
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*
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* @author Maciej Suminski <maciej.suminski@cern.ch>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 3
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* https://www.gnu.org/licenses/gpl-3.0.html
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* or you may search the http://www.gnu.org website for the version 3 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#ifndef NETLIST_EXPORTER_PSPICE_SIM_H
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#define NETLIST_EXPORTER_PSPICE_SIM_H
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#include <netlist_exporters/netlist_exporter_spice.h>
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#include <vector>
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#include "sim_types.h"
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#include "spice_simulator.h"
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#include "spice_value.h"
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struct SPICE_DC_PARAMS
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{
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wxString m_source;
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SPICE_VALUE m_vstart;
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SPICE_VALUE m_vend;
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SPICE_VALUE m_vincrement;
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};
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/// Special netlist exporter flavor that allows one to override simulation commands
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class NGSPICE_CIRCUIT_MODEL : public NETLIST_EXPORTER_SPICE, public SIMULATION_MODEL
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{
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public:
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NGSPICE_CIRCUIT_MODEL( SCHEMATIC_IFACE* aSchematic ) :
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NETLIST_EXPORTER_SPICE( aSchematic )
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{
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}
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virtual ~NGSPICE_CIRCUIT_MODEL() {}
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/**
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* Return name of Spice dataset for a specific plot.
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*
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* @param aVector is name of the vector produced by ngspice
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* @param [out] aSignal is output in form: V(R1), Ib(Q2), I(L8)
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* @return [SPT_VOLTAGE, SPT_CURRENT]. Otherwise SPT_UNKNOWN if vector is
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* of different, unsupported type.
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*/
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SIM_PLOT_TYPE VectorToSignal( const std::string& aVector, wxString& aSignal ) const;
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void SetOptions( int aOptions )
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{
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m_options = aOptions;
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}
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bool GetNetlist( OUTPUTFORMATTER* aFormatter )
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{
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return NGSPICE_CIRCUIT_MODEL::DoWriteNetlist( *aFormatter, m_options );
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}
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/**
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* Override the simulation command directive.
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*/
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void SetSimCommand( const wxString& aCmd )
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{
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m_simCommand = aCmd;
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}
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/**
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* Return the command directive that is in use (either from the sheet or from m_simCommand)
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* @return
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*/
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wxString GetSimCommand()
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{
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return m_simCommand.IsEmpty() ? GetSheetSimCommand() : m_simCommand;
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}
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/**
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* Return the simulation command directive if stored separately (not as a sheet directive).
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*/
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wxString GetUnderlyingSimCommand() const { return m_simCommand; }
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/**
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* Clear the simulation command directive.
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*/
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void ClearSimCommand()
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{
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m_simCommand.Clear();
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}
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/**
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* Return simulation type basing on the simulation command directives.
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*
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* Simulation directives set using SetSimCommand() have priority over the ones placed in
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* schematic sheets.
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*/
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SIM_TYPE GetSimType();
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/**
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* Return simulation command directives placed in schematic sheets (if any).
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*/
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wxString GetSheetSimCommand();
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/**
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* Parse a two-source .dc command directive into its symbols.
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*
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* @param aCmd is the input command string
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* @return true if the command was parsed successfully
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*/
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bool ParseDCCommand( const wxString& aCmd, SPICE_DC_PARAMS* aSource1,
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SPICE_DC_PARAMS* aSource2 );
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/**
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* Determine if a directive is a simulation command.
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*/
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static bool IsSimCommand( const wxString& aCmd )
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{
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return CommandToSimType( aCmd ) != ST_UNKNOWN;
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}
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/**
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* Return simulation type basing on a simulation command directive.
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*/
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static SIM_TYPE CommandToSimType( const wxString& aCmd );
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protected:
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void WriteDirectives( OUTPUTFORMATTER& aFormatter, unsigned aNetlistOptions ) const override;
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private:
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///< Custom simulation command (has priority over the schematic sheet simulation commands)
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wxString m_simCommand;
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int m_options;
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};
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#endif /* NETLIST_EXPORTER_PSPICE_SIM_H */
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