586 lines
18 KiB
C++
586 lines
18 KiB
C++
// Copyright 2017 The Crashpad Authors
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "util/linux/ptracer.h"
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#include <errno.h>
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#include <linux/elf.h>
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#include <string.h>
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#include <sys/ptrace.h>
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#include <sys/uio.h>
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#include "base/logging.h"
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#include "build/build_config.h"
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#include "util/misc/from_pointer_cast.h"
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#if defined(ARCH_CPU_X86_FAMILY)
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#include <asm/ldt.h>
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#endif
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namespace crashpad {
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namespace {
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#if defined(ARCH_CPU_X86_FAMILY)
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template <typename Destination>
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bool GetRegisterSet(pid_t tid, int set, Destination* dest, bool can_log) {
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iovec iov;
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iov.iov_base = dest;
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iov.iov_len = sizeof(*dest);
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if (ptrace(PTRACE_GETREGSET, tid, reinterpret_cast<void*>(set), &iov) != 0) {
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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if (iov.iov_len != sizeof(*dest)) {
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LOG_IF(ERROR, can_log) << "Unexpected registers size " << iov.iov_len
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<< " != " << sizeof(*dest);
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return false;
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}
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return true;
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}
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bool GetFloatingPointRegisters32(pid_t tid,
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FloatContext* context,
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bool can_log) {
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return GetRegisterSet(tid, NT_PRXFPREG, &context->f32.fxsave, can_log);
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}
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bool GetFloatingPointRegisters64(pid_t tid,
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FloatContext* context,
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bool can_log) {
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return GetRegisterSet(tid, NT_PRFPREG, &context->f64.fxsave, can_log);
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}
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bool GetThreadArea32(pid_t tid,
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const ThreadContext& context,
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LinuxVMAddress* address,
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bool can_log) {
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size_t index = (context.t32.xgs & 0xffff) >> 3;
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user_desc desc;
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if (ptrace(
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PTRACE_GET_THREAD_AREA, tid, reinterpret_cast<void*>(index), &desc) !=
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0) {
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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*address = desc.base_addr;
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return true;
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}
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bool GetThreadArea64(pid_t tid,
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const ThreadContext& context,
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LinuxVMAddress* address,
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bool can_log) {
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*address = context.t64.fs_base;
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return true;
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}
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#elif defined(ARCH_CPU_ARM_FAMILY)
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#if defined(ARCH_CPU_ARMEL)
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// PTRACE_GETREGSET, introduced in Linux 2.6.34 (2225a122ae26), requires kernel
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// support enabled by HAVE_ARCH_TRACEHOOK. This has been set for x86 (including
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// x86_64) since Linux 2.6.28 (99bbc4b1e677a), but for ARM only since
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// Linux 3.5.0 (0693bf68148c4). Older Linux kernels support PTRACE_GETREGS,
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// PTRACE_GETFPREGS, and PTRACE_GETVFPREGS instead, which don't allow checking
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// the size of data copied.
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//
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// Fortunately, 64-bit ARM support only appeared in Linux 3.7.0, so if
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// PTRACE_GETREGSET fails on ARM with EIO, indicating that the request is not
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// supported, the kernel must be old enough that 64-bit ARM isn’t supported
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// either.
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//
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// TODO(mark): Once helpers to interpret the kernel version are available, add
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// a DCHECK to ensure that the kernel is older than 3.5.
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bool GetGeneralPurposeRegistersLegacy(pid_t tid,
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ThreadContext* context,
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bool can_log) {
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if (ptrace(PTRACE_GETREGS, tid, nullptr, &context->t32) != 0) {
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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return true;
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}
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bool GetFloatingPointRegistersLegacy(pid_t tid,
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FloatContext* context,
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bool can_log) {
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if (ptrace(PTRACE_GETFPREGS, tid, nullptr, &context->f32.fpregs) != 0) {
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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context->f32.have_fpregs = true;
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if (ptrace(PTRACE_GETVFPREGS, tid, nullptr, &context->f32.vfp) != 0) {
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switch (errno) {
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case EINVAL:
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// These registers are optional on 32-bit ARM cpus
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break;
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default:
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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} else {
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context->f32.have_vfp = true;
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}
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return true;
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}
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#endif // ARCH_CPU_ARMEL
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// Normally, the Linux kernel will copy out register sets according to the size
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// of the struct that contains them. Tracing a 32-bit ARM process running in
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// compatibility mode on a 64-bit ARM cpu will only copy data for the number of
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// registers times the size of the register, which won't include any possible
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// trailing padding in the struct. These are the sizes of the register data, not
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// including any possible padding.
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constexpr size_t kArmVfpSize = 32 * 8 + 4;
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// Target is 32-bit
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bool GetFloatingPointRegisters32(pid_t tid,
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FloatContext* context,
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bool can_log) {
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context->f32.have_fpregs = false;
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context->f32.have_vfp = false;
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iovec iov;
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iov.iov_base = &context->f32.fpregs;
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iov.iov_len = sizeof(context->f32.fpregs);
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if (ptrace(
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PTRACE_GETREGSET, tid, reinterpret_cast<void*>(NT_PRFPREG), &iov) !=
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0) {
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switch (errno) {
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#if defined(ARCH_CPU_ARMEL)
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case EIO:
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return GetFloatingPointRegistersLegacy(tid, context, can_log);
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#endif // ARCH_CPU_ARMEL
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case EINVAL:
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// A 32-bit process running on a 64-bit CPU doesn't have this register
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// set. It should have a VFP register set instead.
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break;
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default:
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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} else {
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if (iov.iov_len != sizeof(context->f32.fpregs)) {
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LOG_IF(ERROR, can_log) << "Unexpected registers size " << iov.iov_len
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<< " != " << sizeof(context->f32.fpregs);
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return false;
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}
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context->f32.have_fpregs = true;
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}
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iov.iov_base = &context->f32.vfp;
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iov.iov_len = sizeof(context->f32.vfp);
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if (ptrace(
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PTRACE_GETREGSET, tid, reinterpret_cast<void*>(NT_ARM_VFP), &iov) !=
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0) {
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switch (errno) {
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case EINVAL:
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// VFP may not be present on 32-bit ARM cpus.
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break;
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default:
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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} else {
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if (iov.iov_len != kArmVfpSize && iov.iov_len != sizeof(context->f32.vfp)) {
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LOG_IF(ERROR, can_log) << "Unexpected registers size " << iov.iov_len
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<< " != " << sizeof(context->f32.vfp);
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return false;
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}
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context->f32.have_vfp = true;
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}
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if (!(context->f32.have_fpregs || context->f32.have_vfp)) {
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LOG_IF(ERROR, can_log) << "Unable to collect registers";
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return false;
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}
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return true;
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}
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bool GetFloatingPointRegisters64(pid_t tid,
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FloatContext* context,
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bool can_log) {
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iovec iov;
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iov.iov_base = context;
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iov.iov_len = sizeof(*context);
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if (ptrace(
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PTRACE_GETREGSET, tid, reinterpret_cast<void*>(NT_PRFPREG), &iov) !=
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0) {
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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if (iov.iov_len != sizeof(context->f64)) {
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LOG_IF(ERROR, can_log) << "Unexpected registers size " << iov.iov_len
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<< " != " << sizeof(context->f64);
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return false;
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}
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return true;
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}
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bool GetThreadArea32(pid_t tid,
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const ThreadContext& context,
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LinuxVMAddress* address,
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bool can_log) {
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#if defined(ARCH_CPU_ARMEL)
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void* result;
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if (ptrace(PTRACE_GET_THREAD_AREA, tid, nullptr, &result) != 0) {
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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*address = FromPointerCast<LinuxVMAddress>(result);
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return true;
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#else
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// TODO(jperaza): it doesn't look like there is a way for a 64-bit ARM process
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// to get the thread area for a 32-bit ARM process with ptrace.
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LOG_IF(WARNING, can_log)
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<< "64-bit ARM cannot trace TLS area for a 32-bit process";
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return false;
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#endif // ARCH_CPU_ARMEL
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}
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bool GetThreadArea64(pid_t tid,
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const ThreadContext& context,
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LinuxVMAddress* address,
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bool can_log) {
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iovec iov;
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iov.iov_base = address;
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iov.iov_len = sizeof(*address);
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if (ptrace(
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PTRACE_GETREGSET, tid, reinterpret_cast<void*>(NT_ARM_TLS), &iov) !=
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0) {
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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if (iov.iov_len != 8) {
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LOG_IF(ERROR, can_log) << "address size mismatch";
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return false;
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}
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return true;
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}
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#elif defined(ARCH_CPU_MIPS_FAMILY)
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// PTRACE_GETREGSET, introduced in Linux 2.6.34 (2225a122ae26), requires kernel
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// support enabled by HAVE_ARCH_TRACEHOOK. This has been set for x86 (including
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// x86_64) since Linux 2.6.28 (99bbc4b1e677a), but for MIPS only since
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// Linux 3.13 (c0ff3c53d4f99). Older Linux kernels support PTRACE_GETREGS,
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// and PTRACE_GETFPREGS instead, which don't allow checking the size of data
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// copied. Also, PTRACE_GETREGS assumes register size of 64 bits even for 32 bit
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// MIPS CPU (contrary to PTRACE_GETREGSET behavior), so we need buffer
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// structure here.
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bool GetGeneralPurposeRegistersLegacy(pid_t tid,
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ThreadContext* context,
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bool can_log) {
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ThreadContext context_buffer;
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if (ptrace(PTRACE_GETREGS, tid, nullptr, &context_buffer.t64) != 0) {
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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// Bitness of target process can't be determined through ptrace here, so we
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// assume target process has the same as current process, making cross-bit
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// ptrace unsupported on MIPS for kernels older than 3.13
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#if defined(ARCH_CPU_MIPSEL)
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#define THREAD_CONTEXT_FIELD t32
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#elif defined(ARCH_CPU_MIPS64EL)
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#define THREAD_CONTEXT_FIELD t64
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#endif
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for (size_t reg = 0; reg < 32; ++reg) {
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context->THREAD_CONTEXT_FIELD.regs[reg] = context_buffer.t64.regs[reg];
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}
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context->THREAD_CONTEXT_FIELD.lo = context_buffer.t64.lo;
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context->THREAD_CONTEXT_FIELD.hi = context_buffer.t64.hi;
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context->THREAD_CONTEXT_FIELD.cp0_epc = context_buffer.t64.cp0_epc;
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context->THREAD_CONTEXT_FIELD.cp0_badvaddr = context_buffer.t64.cp0_badvaddr;
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context->THREAD_CONTEXT_FIELD.cp0_status = context_buffer.t64.cp0_status;
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context->THREAD_CONTEXT_FIELD.cp0_cause = context_buffer.t64.cp0_cause;
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#undef THREAD_CONTEXT_FIELD
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return true;
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}
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bool GetFloatingPointRegistersLegacy(pid_t tid,
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FloatContext* context,
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bool can_log) {
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if (ptrace(PTRACE_GETFPREGS, tid, nullptr, &context->f32.fpregs) != 0) {
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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return true;
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}
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bool GetFloatingPointRegisters32(pid_t tid,
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FloatContext* context,
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bool can_log) {
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iovec iov;
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iov.iov_base = &context->f32.fpregs;
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iov.iov_len = sizeof(context->f32.fpregs);
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if (ptrace(PTRACE_GETFPREGS, tid, nullptr, &context->f32.fpregs) != 0) {
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switch (errno) {
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case EINVAL:
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// fp may not be present
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break;
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case EIO:
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return GetFloatingPointRegistersLegacy(tid, context, can_log);
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default:
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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}
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return true;
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}
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bool GetFloatingPointRegisters64(pid_t tid,
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FloatContext* context,
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bool can_log) {
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iovec iov;
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iov.iov_base = &context->f64.fpregs;
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iov.iov_len = sizeof(context->f64.fpregs);
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if (ptrace(PTRACE_GETFPREGS, tid, nullptr, &context->f64.fpregs) != 0) {
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switch (errno) {
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case EINVAL:
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// fp may not be present
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break;
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case EIO:
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return GetFloatingPointRegistersLegacy(tid, context, can_log);
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default:
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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}
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return true;
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}
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bool GetThreadArea32(pid_t tid,
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const ThreadContext& context,
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LinuxVMAddress* address,
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bool can_log) {
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#if defined(ARCH_CPU_MIPSEL)
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void* result;
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if (ptrace(PTRACE_GET_THREAD_AREA, tid, nullptr, &result) != 0) {
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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*address = FromPointerCast<LinuxVMAddress>(result);
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return true;
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#else
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return false;
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#endif
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}
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bool GetThreadArea64(pid_t tid,
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const ThreadContext& context,
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LinuxVMAddress* address,
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bool can_log) {
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void* result;
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#if defined(ARCH_CPU_MIPSEL)
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if (ptrace(PTRACE_GET_THREAD_AREA_3264, tid, nullptr, &result) != 0) {
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#else
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if (ptrace(PTRACE_GET_THREAD_AREA, tid, nullptr, &result) != 0) {
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#endif
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PLOG_IF(ERROR, can_log) << "ptrace";
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return false;
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}
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*address = FromPointerCast<LinuxVMAddress>(result);
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return true;
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}
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#else
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#error Port.
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#endif // ARCH_CPU_X86_FAMILY
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size_t GetGeneralPurposeRegistersAndLength(pid_t tid,
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ThreadContext* context,
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bool can_log) {
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iovec iov;
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iov.iov_base = context;
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iov.iov_len = sizeof(*context);
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if (ptrace(
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PTRACE_GETREGSET, tid, reinterpret_cast<void*>(NT_PRSTATUS), &iov) !=
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0) {
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switch (errno) {
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#if defined(ARCH_CPU_ARMEL) || defined(ARCH_CPU_MIPS_FAMILY)
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case EIO:
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return GetGeneralPurposeRegistersLegacy(tid, context, can_log)
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? sizeof(context->t32)
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: 0;
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#endif // ARCH_CPU_ARMEL
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default:
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PLOG_IF(ERROR, can_log) << "ptrace";
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return 0;
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}
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}
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return iov.iov_len;
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}
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bool GetGeneralPurposeRegisters32(pid_t tid,
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ThreadContext* context,
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bool can_log) {
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size_t length = GetGeneralPurposeRegistersAndLength(tid, context, can_log);
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if (length != sizeof(context->t32)) {
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LOG_IF(ERROR, can_log) << "Unexpected registers size " << length
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<< " != " << sizeof(context->t32);
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return false;
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}
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return true;
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}
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bool GetGeneralPurposeRegisters64(pid_t tid,
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ThreadContext* context,
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bool can_log) {
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size_t length = GetGeneralPurposeRegistersAndLength(tid, context, can_log);
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if (length != sizeof(context->t64)) {
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LOG_IF(ERROR, can_log) << "Unexpected registers size " << length
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<< " != " << sizeof(context->t64);
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return false;
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}
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return true;
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}
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} // namespace
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Ptracer::Ptracer(bool can_log)
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: is_64_bit_(false), can_log_(can_log), initialized_() {}
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Ptracer::Ptracer(bool is_64_bit, bool can_log)
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: is_64_bit_(is_64_bit), can_log_(can_log), initialized_() {
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INITIALIZATION_STATE_SET_INITIALIZING(initialized_);
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INITIALIZATION_STATE_SET_VALID(initialized_);
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}
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Ptracer::~Ptracer() {}
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bool Ptracer::Initialize(pid_t pid) {
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INITIALIZATION_STATE_SET_INITIALIZING(initialized_);
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ThreadContext context;
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size_t length = GetGeneralPurposeRegistersAndLength(pid, &context, can_log_);
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if (length == sizeof(context.t64)) {
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is_64_bit_ = true;
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} else if (length == sizeof(context.t32)) {
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is_64_bit_ = false;
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} else {
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LOG_IF(ERROR, can_log_)
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<< "Unexpected registers size " << length
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<< " != " << sizeof(context.t64) << ", " << sizeof(context.t32);
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return false;
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}
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INITIALIZATION_STATE_SET_VALID(initialized_);
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return true;
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}
|
||
|
||
bool Ptracer::Is64Bit() {
|
||
INITIALIZATION_STATE_DCHECK_VALID(initialized_);
|
||
return is_64_bit_;
|
||
}
|
||
|
||
bool Ptracer::GetThreadInfo(pid_t tid, ThreadInfo* info) {
|
||
INITIALIZATION_STATE_DCHECK_VALID(initialized_);
|
||
|
||
if (is_64_bit_) {
|
||
return GetGeneralPurposeRegisters64(tid, &info->thread_context, can_log_) &&
|
||
GetFloatingPointRegisters64(tid, &info->float_context, can_log_) &&
|
||
GetThreadArea64(tid,
|
||
info->thread_context,
|
||
&info->thread_specific_data_address,
|
||
can_log_);
|
||
}
|
||
|
||
return GetGeneralPurposeRegisters32(tid, &info->thread_context, can_log_) &&
|
||
GetFloatingPointRegisters32(tid, &info->float_context, can_log_) &&
|
||
GetThreadArea32(tid,
|
||
info->thread_context,
|
||
&info->thread_specific_data_address,
|
||
can_log_);
|
||
}
|
||
|
||
ssize_t Ptracer::ReadUpTo(pid_t pid,
|
||
LinuxVMAddress address,
|
||
size_t size,
|
||
char* buffer) {
|
||
size_t bytes_read = 0;
|
||
while (size > 0) {
|
||
errno = 0;
|
||
|
||
if (size >= sizeof(long)) {
|
||
*reinterpret_cast<long*>(buffer) =
|
||
ptrace(PTRACE_PEEKDATA, pid, address, nullptr);
|
||
|
||
if (errno == EIO) {
|
||
ssize_t last_bytes = ReadLastBytes(pid, address, size, buffer);
|
||
return last_bytes >= 0 ? bytes_read + last_bytes : -1;
|
||
}
|
||
|
||
if (errno != 0) {
|
||
PLOG_IF(ERROR, can_log_) << "ptrace";
|
||
return -1;
|
||
}
|
||
|
||
size -= sizeof(long);
|
||
buffer += sizeof(long);
|
||
address += sizeof(long);
|
||
bytes_read += sizeof(long);
|
||
} else {
|
||
long word = ptrace(PTRACE_PEEKDATA, pid, address, nullptr);
|
||
|
||
if (errno == 0) {
|
||
memcpy(buffer, reinterpret_cast<char*>(&word), size);
|
||
return bytes_read + size;
|
||
}
|
||
|
||
if (errno == EIO) {
|
||
ssize_t last_bytes = ReadLastBytes(pid, address, size, buffer);
|
||
return last_bytes >= 0 ? bytes_read + last_bytes : -1;
|
||
}
|
||
|
||
PLOG_IF(ERROR, can_log_);
|
||
return -1;
|
||
}
|
||
}
|
||
|
||
return bytes_read;
|
||
}
|
||
|
||
// Handles an EIO by reading at most size bytes from address into buffer if
|
||
// address was within a word of a possible page boundary, by aligning to read
|
||
// the last word of the page and extracting the desired bytes.
|
||
ssize_t Ptracer::ReadLastBytes(pid_t pid,
|
||
LinuxVMAddress address,
|
||
size_t size,
|
||
char* buffer) {
|
||
LinuxVMAddress aligned = ((address + 4095) & ~4095) - sizeof(long);
|
||
if (aligned >= address || aligned == address - sizeof(long)) {
|
||
PLOG_IF(ERROR, can_log_) << "ptrace";
|
||
return -1;
|
||
}
|
||
DCHECK_GT(aligned, address - sizeof(long));
|
||
|
||
errno = 0;
|
||
long word = ptrace(PTRACE_PEEKDATA, pid, aligned, nullptr);
|
||
if (errno != 0) {
|
||
PLOG_IF(ERROR, can_log_) << "ptrace";
|
||
return -1;
|
||
}
|
||
|
||
size_t bytes_read = address - aligned;
|
||
size_t last_bytes = std::min(sizeof(long) - bytes_read, size);
|
||
memcpy(buffer, reinterpret_cast<char*>(&word) + bytes_read, last_bytes);
|
||
return last_bytes;
|
||
}
|
||
|
||
} // namespace crashpad
|