1126 lines
39 KiB
C++
1126 lines
39 KiB
C++
/**
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* @file plot_board_layers.cpp
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* @brief Functions to plot one board layer (silkscreen layers or other layers).
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* Silkscreen layers have specific requirement for pads (not filled) and texts
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* (with option to remove them from some copper areas (pads...)
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*/
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/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 1992-2017 KiCad Developers, see AUTHORS.txt for contributors.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include <fctsys.h>
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#include <common.h>
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#include <plotter.h>
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#include <base_struct.h>
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#include <draw_graphic_text.h>
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#include <geometry/geometry_utils.h>
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#include <trigo.h>
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#include <pcb_base_frame.h>
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#include <macros.h>
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#include <class_board.h>
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#include <class_module.h>
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#include <class_track.h>
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#include <class_edge_mod.h>
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#include <class_pcb_text.h>
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#include <class_zone.h>
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#include <class_drawsegment.h>
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#include <class_pcb_target.h>
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#include <class_dimension.h>
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#include <pcbnew.h>
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#include <pcbplot.h>
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#include <gbr_metadata.h>
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// Local
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/* Plot a solder mask layer.
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* Solder mask layers have a minimum thickness value and cannot be drawn like standard layers,
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* unless the minimum thickness is 0.
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*/
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static void PlotSolderMaskLayer( BOARD *aBoard, PLOTTER* aPlotter,
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LSET aLayerMask, const PCB_PLOT_PARAMS& aPlotOpt,
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int aMinThickness );
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/* Creates the plot for silkscreen layers
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* Silkscreen layers have specific requirement for pads (not filled) and texts
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* (with option to remove them from some copper areas (pads...)
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*/
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void PlotSilkScreen( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask,
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const PCB_PLOT_PARAMS& aPlotOpt )
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{
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BRDITEMS_PLOTTER itemplotter( aPlotter, aBoard, aPlotOpt );
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itemplotter.SetLayerSet( aLayerMask );
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// Plot edge layer and graphic items
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itemplotter.PlotBoardGraphicItems();
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// Plot footprint outlines :
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itemplotter.Plot_Edges_Modules();
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// Plot pads (creates pads outlines, for pads on silkscreen layers)
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LSET layersmask_plotpads = aLayerMask;
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// Calculate the mask layers of allowed layers for pads
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if( !aPlotOpt.GetPlotPadsOnSilkLayer() ) // Do not plot pads on silk screen layers
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layersmask_plotpads.set( B_SilkS, false ).set( F_SilkS, false );
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if( layersmask_plotpads.any() )
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{
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for( MODULE* Module = aBoard->m_Modules; Module; Module = Module->Next() )
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{
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aPlotter->StartBlock( NULL );
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for( D_PAD* pad = Module->PadsList(); pad; pad = pad->Next() )
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{
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// See if the pad is on this layer
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LSET masklayer = pad->GetLayerSet();
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if( !( masklayer & layersmask_plotpads ).any() )
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continue;
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COLOR4D color = COLOR4D::BLACK;
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if( layersmask_plotpads[B_SilkS] )
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color = aBoard->Colors().GetLayerColor( B_SilkS );
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if( layersmask_plotpads[F_SilkS] )
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color = ( color == COLOR4D::BLACK) ? aBoard->Colors().GetLayerColor( F_SilkS ) : color;
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itemplotter.PlotPad( pad, color, SKETCH );
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}
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aPlotter->EndBlock( NULL );
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}
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}
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// Plot footprints fields (ref, value ...)
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for( MODULE* module = aBoard->m_Modules; module; module = module->Next() )
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{
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if( ! itemplotter.PlotAllTextsModule( module ) )
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{
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wxLogMessage( _( "Your BOARD has a bad layer number for footprint %s" ),
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GetChars( module->GetReference() ) );
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}
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}
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// Plot filled areas
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aPlotter->StartBlock( NULL );
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for( int ii = 0; ii < aBoard->GetAreaCount(); ii++ )
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{
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ZONE_CONTAINER* edge_zone = aBoard->GetArea( ii );
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if( !aLayerMask[ edge_zone->GetLayer() ] )
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continue;
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itemplotter.PlotFilledAreas( edge_zone );
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}
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aPlotter->EndBlock( NULL );
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}
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void PlotOneBoardLayer( BOARD *aBoard, PLOTTER* aPlotter, PCB_LAYER_ID aLayer,
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const PCB_PLOT_PARAMS& aPlotOpt )
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{
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PCB_PLOT_PARAMS plotOpt = aPlotOpt;
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int soldermask_min_thickness = aBoard->GetDesignSettings().m_SolderMaskMinWidth;
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// Set a default color and the text mode for this layer
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aPlotter->SetColor( aPlotOpt.GetColor() );
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aPlotter->SetTextMode( aPlotOpt.GetTextMode() );
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// Specify that the contents of the "Edges Pcb" layer are to be plotted
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// in addition to the contents of the currently specified layer.
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LSET layer_mask( aLayer );
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if( !aPlotOpt.GetExcludeEdgeLayer() )
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layer_mask.set( Edge_Cuts );
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if( IsCopperLayer( aLayer ) )
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{
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// Skip NPTH pads on copper layers ( only if hole size == pad size ):
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// Drill mark will be plotted,
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// if drill mark is SMALL_DRILL_SHAPE or FULL_DRILL_SHAPE
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if( plotOpt.GetFormat() == PLOT_FORMAT_DXF )
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{
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plotOpt.SetSkipPlotNPTH_Pads( false );
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PlotLayerOutlines( aBoard, aPlotter, layer_mask, plotOpt );
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}
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else
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{
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plotOpt.SetSkipPlotNPTH_Pads( true );
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PlotStandardLayer( aBoard, aPlotter, layer_mask, plotOpt );
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}
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}
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else
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{
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switch( aLayer )
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{
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case B_Mask:
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case F_Mask:
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plotOpt.SetSkipPlotNPTH_Pads( false );
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// Disable plot pad holes
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plotOpt.SetDrillMarksType( PCB_PLOT_PARAMS::NO_DRILL_SHAPE );
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// Plot solder mask:
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if( soldermask_min_thickness == 0 )
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{
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if( plotOpt.GetFormat() == PLOT_FORMAT_DXF )
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PlotLayerOutlines( aBoard, aPlotter, layer_mask, plotOpt );
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else
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PlotStandardLayer( aBoard, aPlotter, layer_mask, plotOpt );
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}
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else
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PlotSolderMaskLayer( aBoard, aPlotter, layer_mask, plotOpt,
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soldermask_min_thickness );
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break;
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case B_Adhes:
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case F_Adhes:
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case B_Paste:
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case F_Paste:
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plotOpt.SetSkipPlotNPTH_Pads( false );
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// Disable plot pad holes
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plotOpt.SetDrillMarksType( PCB_PLOT_PARAMS::NO_DRILL_SHAPE );
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if( plotOpt.GetFormat() == PLOT_FORMAT_DXF )
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PlotLayerOutlines( aBoard, aPlotter, layer_mask, plotOpt );
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else
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PlotStandardLayer( aBoard, aPlotter, layer_mask, plotOpt );
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break;
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case F_SilkS:
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case B_SilkS:
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if( plotOpt.GetFormat() == PLOT_FORMAT_DXF && plotOpt.GetDXFPlotPolygonMode() )
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// PlotLayerOutlines() is designed only for DXF plotters.
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// and must not be used for other plot formats
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PlotLayerOutlines( aBoard, aPlotter, layer_mask, plotOpt );
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else
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PlotSilkScreen( aBoard, aPlotter, layer_mask, plotOpt );
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// Gerber: Subtract soldermask from silkscreen if enabled
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if( aPlotter->GetPlotterType() == PLOT_FORMAT_GERBER
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&& plotOpt.GetSubtractMaskFromSilk() )
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{
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if( aLayer == F_SilkS )
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layer_mask = LSET( F_Mask );
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else
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layer_mask = LSET( B_Mask );
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// Create the mask to subtract by creating a negative layer polarity
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aPlotter->SetLayerPolarity( false );
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// Disable plot pad holes
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plotOpt.SetDrillMarksType( PCB_PLOT_PARAMS::NO_DRILL_SHAPE );
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// Plot the mask
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PlotStandardLayer( aBoard, aPlotter, layer_mask, plotOpt );
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}
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break;
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// These layers are plotted like silk screen layers.
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// Mainly, pads on these layers are not filled.
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// This is not necessary the best choice.
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case Dwgs_User:
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case Cmts_User:
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case Eco1_User:
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case Eco2_User:
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case Edge_Cuts:
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case Margin:
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case F_CrtYd:
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case B_CrtYd:
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case F_Fab:
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case B_Fab:
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plotOpt.SetSkipPlotNPTH_Pads( false );
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plotOpt.SetDrillMarksType( PCB_PLOT_PARAMS::NO_DRILL_SHAPE );
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if( plotOpt.GetFormat() == PLOT_FORMAT_DXF && plotOpt.GetDXFPlotPolygonMode() )
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// PlotLayerOutlines() is designed only for DXF plotters.
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// and must not be used for other plot formats
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PlotLayerOutlines( aBoard, aPlotter, layer_mask, plotOpt );
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else
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PlotSilkScreen( aBoard, aPlotter, layer_mask, plotOpt );
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break;
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default:
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plotOpt.SetSkipPlotNPTH_Pads( false );
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plotOpt.SetDrillMarksType( PCB_PLOT_PARAMS::NO_DRILL_SHAPE );
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if( plotOpt.GetFormat() == PLOT_FORMAT_DXF && plotOpt.GetDXFPlotPolygonMode() )
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// PlotLayerOutlines() is designed only for DXF plotters.
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// and must not be used for other plot formats
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PlotLayerOutlines( aBoard, aPlotter, layer_mask, plotOpt );
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else
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PlotStandardLayer( aBoard, aPlotter, layer_mask, plotOpt );
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break;
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}
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}
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}
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/* Plot a copper layer or mask.
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* Silk screen layers are not plotted here.
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*/
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void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter,
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LSET aLayerMask, const PCB_PLOT_PARAMS& aPlotOpt )
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{
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BRDITEMS_PLOTTER itemplotter( aPlotter, aBoard, aPlotOpt );
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itemplotter.SetLayerSet( aLayerMask );
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EDA_DRAW_MODE_T plotMode = aPlotOpt.GetPlotMode();
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// Plot edge layer and graphic items
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itemplotter.PlotBoardGraphicItems();
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// Draw footprint shapes without pads (pads will plotted later)
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// We plot here module texts, but they are usually on silkscreen layer,
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// so they are not plot here but plot by PlotSilkScreen()
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// Plot footprints fields (ref, value ...)
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for( MODULE* module = aBoard->m_Modules; module; module = module->Next() )
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{
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if( ! itemplotter.PlotAllTextsModule( module ) )
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{
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wxLogMessage( _( "Your BOARD has a bad layer number for footprint %s" ),
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GetChars( module->GetReference() ) );
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}
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}
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for( MODULE* module = aBoard->m_Modules; module; module = module->Next() )
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{
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for( BOARD_ITEM* item = module->GraphicalItemsList(); item; item = item->Next() )
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{
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if( !aLayerMask[ item->GetLayer() ] )
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continue;
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switch( item->Type() )
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{
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case PCB_MODULE_EDGE_T:
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itemplotter.Plot_1_EdgeModule( (EDGE_MODULE*) item );
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break;
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default:
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break;
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}
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}
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}
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// Plot footprint pads
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for( MODULE* module = aBoard->m_Modules; module; module = module->Next() )
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{
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aPlotter->StartBlock( NULL );
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for( D_PAD* pad = module->PadsList(); pad; pad = pad->Next() )
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{
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if( (pad->GetLayerSet() & aLayerMask) == 0 )
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continue;
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wxSize margin;
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double width_adj = 0;
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if( ( aLayerMask & LSET::AllCuMask() ).any() )
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width_adj = itemplotter.getFineWidthAdj();
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static const LSET speed( 4, B_Mask, F_Mask, B_Paste, F_Paste );
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LSET anded = ( speed & aLayerMask );
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if( anded == LSET( F_Mask ) || anded == LSET( B_Mask ) )
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{
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margin.x = margin.y = pad->GetSolderMaskMargin();
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}
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else if( anded == LSET( F_Paste ) || anded == LSET( B_Paste ) )
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{
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margin = pad->GetSolderPasteMargin();
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}
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// Now offset the pad size by margin + width_adj
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// this is easy for most shapes, but not for a trapezoid or a custom shape
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wxSize padPlotsSize;
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wxSize extraSize = margin * 2;
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extraSize.x += width_adj;
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extraSize.y += width_adj;
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wxSize deltaSize = pad->GetDelta(); // has meaning only for trapezoidal pads
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if( pad->GetShape() == PAD_SHAPE_TRAPEZOID )
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{ // The easy way is to use BuildPadPolygon to calculate
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// size and delta of the trapezoidal pad after offseting:
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wxPoint coord[4];
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pad->BuildPadPolygon( coord, extraSize/2, 0.0 );
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// Calculate the size and delta from polygon corners coordinates:
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// coord[0] is the lower left
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// coord[1] is the upper left
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// coord[2] is the upper right
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// coord[3] is the lower right
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// the size is the distance between middle of segments
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// (left/right or top/bottom)
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// size X is the dist between left and right middle points:
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padPlotsSize.x = ( ( -coord[0].x + coord[3].x ) // the lower segment X length
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+ ( -coord[1].x + coord[2].x ) ) // the upper segment X length
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/ 2; // the Y size is the half sum
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// size Y is the dist between top and bottom middle points:
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padPlotsSize.y = ( ( coord[0].y - coord[1].y ) // the left segment Y lenght
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+ ( coord[3].y - coord[2].y ) ) // the right segment Y lenght
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/ 2; // the Y size is the half sum
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// calculate the delta ( difference of lenght between 2 opposite edges )
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// The delta.x is the delta along the X axis, therefore the delta of Y lenghts
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wxSize delta;
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if( coord[0].y != coord[3].y )
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delta.x = coord[0].y - coord[3].y;
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else
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delta.y = coord[1].x - coord[0].x;
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pad->SetDelta( delta );
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}
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else
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padPlotsSize = pad->GetSize() + extraSize;
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// Don't draw a null size item :
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if( padPlotsSize.x <= 0 || padPlotsSize.y <= 0 )
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continue;
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COLOR4D color = COLOR4D::BLACK;
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if( pad->GetLayerSet()[B_Cu] )
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color = aBoard->Colors().GetItemColor( LAYER_PAD_BK );
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if( pad->GetLayerSet()[F_Cu] )
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color = color.LegacyMix( aBoard->Colors().GetItemColor( LAYER_PAD_FR ) );
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// Temporary set the pad size to the required plot size:
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wxSize tmppadsize = pad->GetSize();
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switch( pad->GetShape() )
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{
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case PAD_SHAPE_CIRCLE:
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case PAD_SHAPE_OVAL:
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pad->SetSize( padPlotsSize );
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if( aPlotOpt.GetSkipPlotNPTH_Pads() &&
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( pad->GetSize() == pad->GetDrillSize() ) &&
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( pad->GetAttribute() == PAD_ATTRIB_HOLE_NOT_PLATED ) )
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break;
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itemplotter.PlotPad( pad, color, plotMode );
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break;
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case PAD_SHAPE_TRAPEZOID:
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case PAD_SHAPE_RECT:
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case PAD_SHAPE_ROUNDRECT:
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case PAD_SHAPE_CHAMFERED_RECT:
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pad->SetSize( padPlotsSize );
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itemplotter.PlotPad( pad, color, plotMode );
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break;
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case PAD_SHAPE_CUSTOM:
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// inflate/deflate a custom shape is a bit complex.
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// so build a similar pad shape, and inflate/deflate the polygonal shape
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{
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// we expect margin.x = margin.y for custom pads
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if( margin.x < 0 )
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// be sure the anchor pad is not bigger than the deflated shape
|
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// because this anchor will be added to the pad shape when plotting
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// the pad
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pad->SetSize( padPlotsSize );
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D_PAD dummy( *pad );
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SHAPE_POLY_SET shape;
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pad->MergePrimitivesAsPolygon( &shape );
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// shape polygon can have holes linked to the main outline.
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// So use InflateWithLinkedHoles(), not Inflate() that can create
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// bad shapes if margin.x is < 0
|
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int numSegs = std::max(
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GetArcToSegmentCount( margin.x, aBoard->GetDesignSettings().m_MaxError,
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360.0 ), 6 );
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shape.InflateWithLinkedHoles( margin.x, numSegs, SHAPE_POLY_SET::PM_FAST );
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dummy.DeletePrimitivesList();
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dummy.AddPrimitive( shape, 0 );
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dummy.MergePrimitivesAsPolygon();
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itemplotter.PlotPad( &dummy, color, plotMode );
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}
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break;
|
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}
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pad->SetSize( tmppadsize ); // Restore the pad size
|
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pad->SetDelta( deltaSize );
|
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}
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aPlotter->EndBlock( NULL );
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}
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|
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// Plot vias on copper layers, and if aPlotOpt.GetPlotViaOnMaskLayer() is true,
|
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// plot them on solder mask
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|
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GBR_METADATA gbr_metadata;
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|
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bool isOnCopperLayer = ( aLayerMask & LSET::AllCuMask() ).any();
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|
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if( isOnCopperLayer )
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{
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gbr_metadata.SetApertureAttrib( GBR_APERTURE_METADATA::GBR_APERTURE_ATTRIB_VIAPAD );
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|
gbr_metadata.SetNetAttribType( GBR_NETLIST_METADATA::GBR_NETINFO_NET );
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}
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|
|
aPlotter->StartBlock( NULL );
|
|
|
|
for( TRACK* track = aBoard->m_Track; track; track = track->Next() )
|
|
{
|
|
const VIA* Via = dyn_cast<const VIA*>( track );
|
|
|
|
if( !Via )
|
|
continue;
|
|
|
|
// vias are not plotted if not on selected layer, but if layer
|
|
// is SOLDERMASK_LAYER_BACK or SOLDERMASK_LAYER_FRONT,vias are drawn,
|
|
// only if they are on the corresponding external copper layer
|
|
LSET via_mask_layer = Via->GetLayerSet();
|
|
|
|
if( aPlotOpt.GetPlotViaOnMaskLayer() )
|
|
{
|
|
if( via_mask_layer[B_Cu] )
|
|
via_mask_layer.set( B_Mask );
|
|
|
|
if( via_mask_layer[F_Cu] )
|
|
via_mask_layer.set( F_Mask );
|
|
}
|
|
|
|
if( !( via_mask_layer & aLayerMask ).any() )
|
|
continue;
|
|
|
|
int via_margin = 0;
|
|
double width_adj = 0;
|
|
|
|
// If the current layer is a solder mask, use the global mask
|
|
// clearance for vias
|
|
if( aLayerMask[B_Mask] || aLayerMask[F_Mask] )
|
|
via_margin = aBoard->GetDesignSettings().m_SolderMaskMargin;
|
|
|
|
if( ( aLayerMask & LSET::AllCuMask() ).any() )
|
|
width_adj = itemplotter.getFineWidthAdj();
|
|
|
|
int diameter = Via->GetWidth() + 2 * via_margin + width_adj;
|
|
|
|
// Don't draw a null size item :
|
|
if( diameter <= 0 )
|
|
continue;
|
|
|
|
// Some vias can be not connected (no net).
|
|
// Set the m_NotInNet for these vias to force a empty net name in gerber file
|
|
gbr_metadata.m_NetlistMetadata.m_NotInNet = Via->GetNetname().IsEmpty();
|
|
|
|
gbr_metadata.SetNetName( Via->GetNetname() );
|
|
|
|
COLOR4D color = aBoard->Colors().GetItemColor( LAYER_VIAS + Via->GetViaType() );
|
|
// Set plot color (change WHITE to LIGHTGRAY because
|
|
// the white items are not seen on a white paper or screen
|
|
aPlotter->SetColor( color != WHITE ? color : LIGHTGRAY);
|
|
aPlotter->FlashPadCircle( Via->GetStart(), diameter, plotMode, &gbr_metadata );
|
|
}
|
|
|
|
aPlotter->EndBlock( NULL );
|
|
aPlotter->StartBlock( NULL );
|
|
gbr_metadata.SetApertureAttrib( GBR_APERTURE_METADATA::GBR_APERTURE_ATTRIB_CONDUCTOR );
|
|
|
|
// Plot tracks (not vias) :
|
|
for( TRACK* track = aBoard->m_Track; track; track = track->Next() )
|
|
{
|
|
if( track->Type() == PCB_VIA_T )
|
|
continue;
|
|
|
|
if( !aLayerMask[track->GetLayer()] )
|
|
continue;
|
|
|
|
// Some track segments can be not connected (no net).
|
|
// Set the m_NotInNet for these segments to force a empty net name in gerber file
|
|
gbr_metadata.m_NetlistMetadata.m_NotInNet = track->GetNetname().IsEmpty();
|
|
|
|
gbr_metadata.SetNetName( track->GetNetname() );
|
|
int width = track->GetWidth() + itemplotter.getFineWidthAdj();
|
|
aPlotter->SetColor( itemplotter.getColor( track->GetLayer() ) );
|
|
aPlotter->ThickSegment( track->GetStart(), track->GetEnd(), width, plotMode, &gbr_metadata );
|
|
}
|
|
|
|
aPlotter->EndBlock( NULL );
|
|
|
|
// Plot filled ares
|
|
aPlotter->StartBlock( NULL );
|
|
for( int ii = 0; ii < aBoard->GetAreaCount(); ii++ )
|
|
{
|
|
ZONE_CONTAINER* zone = aBoard->GetArea( ii );
|
|
|
|
if( !aLayerMask[zone->GetLayer()] )
|
|
continue;
|
|
|
|
itemplotter.PlotFilledAreas( zone );
|
|
}
|
|
aPlotter->EndBlock( NULL );
|
|
|
|
// Adding drill marks, if required and if the plotter is able to plot them:
|
|
if( aPlotOpt.GetDrillMarksType() != PCB_PLOT_PARAMS::NO_DRILL_SHAPE )
|
|
itemplotter.PlotDrillMarks();
|
|
}
|
|
|
|
|
|
// Seems like we want to plot from back to front?
|
|
static const PCB_LAYER_ID plot_seq[] = {
|
|
|
|
B_Adhes, // 32
|
|
F_Adhes,
|
|
B_Paste,
|
|
F_Paste,
|
|
B_SilkS,
|
|
B_Mask,
|
|
F_Mask,
|
|
Dwgs_User,
|
|
Cmts_User,
|
|
Eco1_User,
|
|
Eco2_User,
|
|
Edge_Cuts,
|
|
Margin,
|
|
|
|
F_CrtYd, // CrtYd & Body are footprint only
|
|
B_CrtYd,
|
|
F_Fab,
|
|
B_Fab,
|
|
|
|
B_Cu,
|
|
In30_Cu,
|
|
In29_Cu,
|
|
In28_Cu,
|
|
In27_Cu,
|
|
In26_Cu,
|
|
In25_Cu,
|
|
In24_Cu,
|
|
In23_Cu,
|
|
In22_Cu,
|
|
In21_Cu,
|
|
In20_Cu,
|
|
In19_Cu,
|
|
In18_Cu,
|
|
In17_Cu,
|
|
In16_Cu,
|
|
In15_Cu,
|
|
In14_Cu,
|
|
In13_Cu,
|
|
In12_Cu,
|
|
In11_Cu,
|
|
In10_Cu,
|
|
In9_Cu,
|
|
In8_Cu,
|
|
In7_Cu,
|
|
In6_Cu,
|
|
In5_Cu,
|
|
In4_Cu,
|
|
In3_Cu,
|
|
In2_Cu,
|
|
In1_Cu,
|
|
F_Cu,
|
|
|
|
F_SilkS,
|
|
};
|
|
|
|
|
|
/* Plot outlines of copper, for copper layer
|
|
*/
|
|
void PlotLayerOutlines( BOARD* aBoard, PLOTTER* aPlotter,
|
|
LSET aLayerMask, const PCB_PLOT_PARAMS& aPlotOpt )
|
|
{
|
|
|
|
BRDITEMS_PLOTTER itemplotter( aPlotter, aBoard, aPlotOpt );
|
|
itemplotter.SetLayerSet( aLayerMask );
|
|
|
|
SHAPE_POLY_SET outlines;
|
|
|
|
for( LSEQ seq = aLayerMask.Seq( plot_seq, arrayDim( plot_seq ) ); seq; ++seq )
|
|
{
|
|
PCB_LAYER_ID layer = *seq;
|
|
|
|
outlines.RemoveAllContours();
|
|
aBoard->ConvertBrdLayerToPolygonalContours( layer, outlines );
|
|
|
|
outlines.Simplify( SHAPE_POLY_SET::PM_FAST );
|
|
|
|
// Plot outlines
|
|
std::vector< wxPoint > cornerList;
|
|
|
|
// Now we have one or more basic polygons: plot each polygon
|
|
for( int ii = 0; ii < outlines.OutlineCount(); ii++ )
|
|
{
|
|
for(int kk = 0; kk <= outlines.HoleCount (ii); kk++ )
|
|
{
|
|
cornerList.clear();
|
|
const SHAPE_LINE_CHAIN& path = (kk == 0) ? outlines.COutline( ii ) : outlines.CHole( ii, kk - 1 );
|
|
|
|
for( int jj = 0; jj < path.PointCount(); jj++ )
|
|
cornerList.push_back( wxPoint( path.CPoint( jj ).x , path.CPoint( jj ).y ) );
|
|
|
|
|
|
// Ensure the polygon is closed
|
|
if( cornerList[0] != cornerList[cornerList.size() - 1] )
|
|
cornerList.push_back( cornerList[0] );
|
|
|
|
aPlotter->PlotPoly( cornerList, NO_FILL );
|
|
}
|
|
}
|
|
|
|
// Plot pad holes
|
|
if( aPlotOpt.GetDrillMarksType() != PCB_PLOT_PARAMS::NO_DRILL_SHAPE )
|
|
{
|
|
int smallDrill = (aPlotOpt.GetDrillMarksType() == PCB_PLOT_PARAMS::SMALL_DRILL_SHAPE)
|
|
? SMALL_DRILL : INT_MAX;
|
|
|
|
for( MODULE* module = aBoard->m_Modules; module; module = module->Next() )
|
|
{
|
|
for( D_PAD* pad = module->PadsList(); pad; pad = pad->Next() )
|
|
{
|
|
wxSize hole = pad->GetDrillSize();
|
|
|
|
if( hole.x == 0 || hole.y == 0 )
|
|
continue;
|
|
|
|
if( hole.x == hole.y )
|
|
{
|
|
hole.x = std::min( smallDrill, hole.x );
|
|
aPlotter->Circle( pad->GetPosition(), hole.x, NO_FILL );
|
|
}
|
|
else
|
|
{
|
|
// Note: small drill marks have no significance when applied to slots
|
|
wxPoint drl_start, drl_end;
|
|
int width;
|
|
pad->GetOblongDrillGeometry( drl_start, drl_end, width );
|
|
aPlotter->ThickSegment( pad->GetPosition() + drl_start,
|
|
pad->GetPosition() + drl_end, width, SKETCH, NULL );
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
// Plot vias holes
|
|
for( TRACK* track = aBoard->m_Track; track; track = track->Next() )
|
|
{
|
|
const VIA* via = dyn_cast<const VIA*>( track );
|
|
|
|
if( via && via->IsOnLayer( layer ) ) // via holes can be not through holes
|
|
{
|
|
aPlotter->Circle( via->GetPosition(), via->GetDrillValue(), NO_FILL );
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
/* Plot a solder mask layer.
|
|
* Solder mask layers have a minimum thickness value and cannot be drawn like standard layers,
|
|
* unless the minimum thickness is 0.
|
|
* Currently the algo is:
|
|
* 1 - build all pad shapes as polygons with a size inflated by
|
|
* mask clearance + (min width solder mask /2)
|
|
* 2 - Merge shapes
|
|
* 3 - deflate result by (min width solder mask /2)
|
|
* 4 - ORing result by all pad shapes as polygons with a size inflated by
|
|
* mask clearance only (because deflate sometimes creates shape artifacts)
|
|
* 5 - draw result as polygons
|
|
*
|
|
* TODO:
|
|
* make this calculation only for shapes with clearance near than (min width solder mask)
|
|
* (using DRC algo)
|
|
* plot all other shapes by flashing the basing shape
|
|
* (shapes will be better, and calculations faster)
|
|
*/
|
|
void PlotSolderMaskLayer( BOARD *aBoard, PLOTTER* aPlotter,
|
|
LSET aLayerMask, const PCB_PLOT_PARAMS& aPlotOpt,
|
|
int aMinThickness )
|
|
{
|
|
PCB_LAYER_ID layer = aLayerMask[B_Mask] ? B_Mask : F_Mask;
|
|
|
|
// We remove 1nm as we expand both sides of the shapes, so allowing for
|
|
// a strictly greater than or equal comparison in the shape separation (boolean add)
|
|
// means that we will end up with separate shapes that then are shrunk
|
|
int inflate = aMinThickness/2 - 1;
|
|
|
|
BRDITEMS_PLOTTER itemplotter( aPlotter, aBoard, aPlotOpt );
|
|
itemplotter.SetLayerSet( aLayerMask );
|
|
|
|
// Plot edge layer and graphic items
|
|
// They do not have a solder Mask margin, because they are only graphic items
|
|
// on this layer (like logos), not actually areas around pads.
|
|
itemplotter.PlotBoardGraphicItems();
|
|
|
|
for( MODULE* module = aBoard->m_Modules; module; module = module->Next() )
|
|
{
|
|
for( BOARD_ITEM* item = module->GraphicalItemsList(); item; item = item->Next() )
|
|
{
|
|
if( layer != item->GetLayer() )
|
|
continue;
|
|
|
|
switch( item->Type() )
|
|
{
|
|
case PCB_MODULE_EDGE_T:
|
|
itemplotter.Plot_1_EdgeModule( (EDGE_MODULE*) item );
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
// Build polygons for each pad shape.
|
|
// the size of the shape on solder mask should be:
|
|
// size of pad + clearance around the pad.
|
|
// clearance = solder mask clearance + extra margin
|
|
// extra margin is half the min width for solder mask
|
|
// This extra margin is used to merge too close shapes
|
|
// (distance < aMinThickness), and will be removed when creating
|
|
// the actual shapes
|
|
SHAPE_POLY_SET areas; // Contains shapes to plot
|
|
SHAPE_POLY_SET initialPolys; // Contains exact shapes to plot
|
|
|
|
// Plot pads
|
|
for( MODULE* module = aBoard->m_Modules; module; module = module->Next() )
|
|
{
|
|
// add shapes with exact size
|
|
module->TransformPadsShapesWithClearanceToPolygon( layer, initialPolys, 0 );
|
|
// add shapes inflated by aMinThickness/2
|
|
module->TransformPadsShapesWithClearanceToPolygon( layer, areas, inflate );
|
|
}
|
|
|
|
// Plot vias on solder masks, if aPlotOpt.GetPlotViaOnMaskLayer() is true,
|
|
if( aPlotOpt.GetPlotViaOnMaskLayer() )
|
|
{
|
|
// The current layer is a solder mask,
|
|
// use the global mask clearance for vias
|
|
int via_clearance = aBoard->GetDesignSettings().m_SolderMaskMargin;
|
|
int via_margin = via_clearance + inflate;
|
|
|
|
for( TRACK* track = aBoard->m_Track; track; track = track->Next() )
|
|
{
|
|
const VIA* via = dyn_cast<const VIA*>( track );
|
|
|
|
if( !via )
|
|
continue;
|
|
|
|
// vias are plotted only if they are on the corresponding
|
|
// external copper layer
|
|
LSET via_set = via->GetLayerSet();
|
|
|
|
if( via_set[B_Cu] )
|
|
via_set.set( B_Mask );
|
|
|
|
if( via_set[F_Cu] )
|
|
via_set.set( F_Mask );
|
|
|
|
if( !( via_set & aLayerMask ).any() )
|
|
continue;
|
|
|
|
via->TransformShapeWithClearanceToPolygon( areas, via_margin );
|
|
via->TransformShapeWithClearanceToPolygon( initialPolys, via_clearance );
|
|
}
|
|
}
|
|
|
|
// Add filled zone areas.
|
|
#if 0 // Set to 1 if a solder mask margin must be applied to zones on solder mask
|
|
int zone_margin = aBoard->GetDesignSettings().m_SolderMaskMargin;
|
|
#else
|
|
int zone_margin = 0;
|
|
#endif
|
|
|
|
for( int ii = 0; ii < aBoard->GetAreaCount(); ii++ )
|
|
{
|
|
ZONE_CONTAINER* zone = aBoard->GetArea( ii );
|
|
|
|
if( zone->GetLayer() != layer )
|
|
continue;
|
|
|
|
zone->TransformOutlinesShapeWithClearanceToPolygon( areas, inflate + zone_margin, false );
|
|
zone->TransformOutlinesShapeWithClearanceToPolygon( initialPolys, zone_margin, false );
|
|
}
|
|
|
|
// To avoid a lot of code, use a ZONE_CONTAINER
|
|
// to handle and plot polygons, because our polygons look exactly like
|
|
// filled areas in zones
|
|
// Note, also this code is not optimized: it creates a lot of copy/duplicate data
|
|
// However it is not complex, and fast enough for plot purposes (copy/convert data
|
|
// is only a very small calculation time for these calculations)
|
|
ZONE_CONTAINER zone( aBoard );
|
|
zone.SetMinThickness( 0 ); // trace polygons only
|
|
zone.SetLayer( layer );
|
|
int numSegs = std::max(
|
|
GetArcToSegmentCount( inflate, aBoard->GetDesignSettings().m_MaxError, 360.0 ), 6 );
|
|
|
|
areas.BooleanAdd( initialPolys, SHAPE_POLY_SET::PM_FAST );
|
|
areas.Inflate( -inflate, numSegs );
|
|
|
|
// Combine the current areas to initial areas. This is mandatory because
|
|
// inflate/deflate transform is not perfect, and we want the initial areas perfectly kept
|
|
areas.BooleanAdd( initialPolys, SHAPE_POLY_SET::PM_FAST );
|
|
areas.Fracture( SHAPE_POLY_SET::PM_STRICTLY_SIMPLE );
|
|
|
|
zone.SetFilledPolysList( areas );
|
|
|
|
itemplotter.PlotFilledAreas( &zone );
|
|
}
|
|
|
|
|
|
|
|
/** Set up most plot options for plotting a board (especially the viewport)
|
|
* Important thing:
|
|
* page size is the 'drawing' page size,
|
|
* paper size is the physical page size
|
|
*/
|
|
static void initializePlotter( PLOTTER *aPlotter, BOARD * aBoard,
|
|
PCB_PLOT_PARAMS *aPlotOpts )
|
|
{
|
|
PAGE_INFO pageA4( wxT( "A4" ) );
|
|
const PAGE_INFO& pageInfo = aBoard->GetPageSettings();
|
|
const PAGE_INFO* sheet_info;
|
|
double paperscale; // Page-to-paper ratio
|
|
wxSize paperSizeIU;
|
|
wxSize pageSizeIU( pageInfo.GetSizeIU() );
|
|
bool autocenter = false;
|
|
|
|
/* Special options: to fit the sheet to an A4 sheet replace
|
|
the paper size. However there is a difference between
|
|
the autoscale and the a4paper option:
|
|
- Autoscale fits the board to the paper size
|
|
- A4paper fits the original paper size to an A4 sheet
|
|
- Both of them fit the board to an A4 sheet
|
|
*/
|
|
if( aPlotOpts->GetA4Output() ) // Fit paper to A4
|
|
{
|
|
sheet_info = &pageA4;
|
|
paperSizeIU = pageA4.GetSizeIU();
|
|
paperscale = (double) paperSizeIU.x / pageSizeIU.x;
|
|
autocenter = true;
|
|
}
|
|
else
|
|
{
|
|
sheet_info = &pageInfo;
|
|
paperSizeIU = pageSizeIU;
|
|
paperscale = 1;
|
|
|
|
// Need autocentering only if scale is not 1:1
|
|
autocenter = (aPlotOpts->GetScale() != 1.0);
|
|
}
|
|
|
|
EDA_RECT bbox = aBoard->ComputeBoundingBox();
|
|
wxPoint boardCenter = bbox.Centre();
|
|
wxSize boardSize = bbox.GetSize();
|
|
|
|
double compound_scale;
|
|
|
|
/* Fit to 80% of the page if asked; it could be that the board is empty,
|
|
* in this case regress to 1:1 scale */
|
|
if( aPlotOpts->GetAutoScale() && boardSize.x > 0 && boardSize.y > 0 )
|
|
{
|
|
double xscale = (paperSizeIU.x * 0.8) / boardSize.x;
|
|
double yscale = (paperSizeIU.y * 0.8) / boardSize.y;
|
|
|
|
compound_scale = std::min( xscale, yscale ) * paperscale;
|
|
}
|
|
else
|
|
compound_scale = aPlotOpts->GetScale() * paperscale;
|
|
|
|
|
|
/* For the plot offset we have to keep in mind the auxiliary origin
|
|
too: if autoscaling is off we check that plot option (i.e. autoscaling
|
|
overrides auxiliary origin) */
|
|
wxPoint offset( 0, 0);
|
|
|
|
if( autocenter )
|
|
{
|
|
offset.x = KiROUND( boardCenter.x - ( paperSizeIU.x / 2.0 ) / compound_scale );
|
|
offset.y = KiROUND( boardCenter.y - ( paperSizeIU.y / 2.0 ) / compound_scale );
|
|
}
|
|
else
|
|
{
|
|
if( aPlotOpts->GetUseAuxOrigin() )
|
|
offset = aBoard->GetAuxOrigin();
|
|
}
|
|
|
|
/* Configure the plotter object with all the stuff computed and
|
|
most of that taken from the options */
|
|
aPlotter->SetPageSettings( *sheet_info );
|
|
|
|
aPlotter->SetViewport( offset, IU_PER_MILS/10, compound_scale,
|
|
aPlotOpts->GetMirror() );
|
|
// has meaning only for gerber plotter. Must be called only after SetViewport
|
|
aPlotter->SetGerberCoordinatesFormat( aPlotOpts->GetGerberPrecision() );
|
|
|
|
aPlotter->SetDefaultLineWidth( aPlotOpts->GetLineWidth() );
|
|
aPlotter->SetCreator( wxT( "PCBNEW" ) );
|
|
aPlotter->SetColorMode( false ); // default is plot in Black and White.
|
|
aPlotter->SetTextMode( aPlotOpts->GetTextMode() );
|
|
}
|
|
|
|
/** Prefill in black an area a little bigger than the board to prepare for the
|
|
* negative plot */
|
|
static void FillNegativeKnockout( PLOTTER *aPlotter, const EDA_RECT &aBbbox )
|
|
{
|
|
const int margin = 5 * IU_PER_MM; // Add a 5 mm margin around the board
|
|
aPlotter->SetNegative( true );
|
|
aPlotter->SetColor( WHITE ); // Which will be plotted as black
|
|
EDA_RECT area = aBbbox;
|
|
area.Inflate( margin );
|
|
aPlotter->Rect( area.GetOrigin(), area.GetEnd(), FILLED_SHAPE );
|
|
aPlotter->SetColor( BLACK );
|
|
}
|
|
|
|
/** Calculate the effective size of HPGL pens and set them in the
|
|
* plotter object */
|
|
static void ConfigureHPGLPenSizes( HPGL_PLOTTER *aPlotter,
|
|
PCB_PLOT_PARAMS *aPlotOpts )
|
|
{
|
|
/* Compute pen_dim (the value is given in mils) in pcb units,
|
|
with plot scale (if Scale is 2, pen diameter value is always m_HPGLPenDiam
|
|
so apparent pen diam is actually pen diam / Scale */
|
|
int pen_diam = KiROUND( aPlotOpts->GetHPGLPenDiameter() * IU_PER_MILS /
|
|
aPlotOpts->GetScale() );
|
|
|
|
// Set HPGL-specific options and start
|
|
aPlotter->SetPenSpeed( aPlotOpts->GetHPGLPenSpeed() );
|
|
aPlotter->SetPenNumber( aPlotOpts->GetHPGLPenNum() );
|
|
aPlotter->SetPenDiameter( pen_diam );
|
|
}
|
|
|
|
/** Open a new plotfile using the options (and especially the format)
|
|
* specified in the options and prepare the page for plotting.
|
|
* Return the plotter object if OK, NULL if the file is not created
|
|
* (or has a problem)
|
|
*/
|
|
PLOTTER* StartPlotBoard( BOARD *aBoard, PCB_PLOT_PARAMS *aPlotOpts,
|
|
int aLayer,
|
|
const wxString& aFullFileName,
|
|
const wxString& aSheetDesc )
|
|
{
|
|
// Create the plotter driver and set the few plotter specific
|
|
// options
|
|
PLOTTER* plotter = NULL;
|
|
|
|
switch( aPlotOpts->GetFormat() )
|
|
{
|
|
case PLOT_FORMAT_DXF:
|
|
plotter = new DXF_PLOTTER();
|
|
break;
|
|
|
|
case PLOT_FORMAT_POST:
|
|
PS_PLOTTER* PS_plotter;
|
|
PS_plotter = new PS_PLOTTER();
|
|
PS_plotter->SetScaleAdjust( aPlotOpts->GetFineScaleAdjustX(),
|
|
aPlotOpts->GetFineScaleAdjustY() );
|
|
plotter = PS_plotter;
|
|
break;
|
|
|
|
case PLOT_FORMAT_PDF:
|
|
plotter = new PDF_PLOTTER();
|
|
break;
|
|
|
|
case PLOT_FORMAT_HPGL:
|
|
HPGL_PLOTTER* HPGL_plotter;
|
|
HPGL_plotter = new HPGL_PLOTTER();
|
|
|
|
/* HPGL options are a little more convoluted to compute, so
|
|
they're split in another function */
|
|
ConfigureHPGLPenSizes( HPGL_plotter, aPlotOpts );
|
|
plotter = HPGL_plotter;
|
|
break;
|
|
|
|
case PLOT_FORMAT_GERBER:
|
|
plotter = new GERBER_PLOTTER();
|
|
break;
|
|
|
|
case PLOT_FORMAT_SVG:
|
|
plotter = new SVG_PLOTTER();
|
|
break;
|
|
|
|
default:
|
|
wxASSERT( false );
|
|
return NULL;
|
|
}
|
|
|
|
// Compute the viewport and set the other options
|
|
|
|
// page layout is not mirrored, so temporary change mirror option
|
|
// just to plot the page layout
|
|
PCB_PLOT_PARAMS plotOpts = *aPlotOpts;
|
|
|
|
if( plotOpts.GetPlotFrameRef() && plotOpts.GetMirror() )
|
|
plotOpts.SetMirror( false );
|
|
|
|
initializePlotter( plotter, aBoard, &plotOpts );
|
|
|
|
if( plotter->OpenFile( aFullFileName ) )
|
|
{
|
|
plotter->ClearHeaderLinesList();
|
|
|
|
// For the Gerber "file function" attribute, set the layer number
|
|
if( plotter->GetPlotterType() == PLOT_FORMAT_GERBER )
|
|
{
|
|
bool useX2mode = plotOpts.GetUseGerberX2format();
|
|
|
|
GERBER_PLOTTER* gbrplotter = static_cast <GERBER_PLOTTER*> ( plotter );
|
|
gbrplotter->UseX2format( useX2mode );
|
|
gbrplotter->UseX2NetAttributes( plotOpts.GetIncludeGerberNetlistInfo() );
|
|
|
|
// Attributes can be added using X2 format or as comment (X1 format)
|
|
AddGerberX2Attribute( plotter, aBoard, aLayer, not useX2mode );
|
|
}
|
|
|
|
plotter->StartPlot();
|
|
|
|
// Plot the frame reference if requested
|
|
if( aPlotOpts->GetPlotFrameRef() )
|
|
{
|
|
PlotWorkSheet( plotter, aBoard->GetTitleBlock(),
|
|
aBoard->GetPageSettings(),
|
|
1, 1, // Only one page
|
|
aSheetDesc, aBoard->GetFileName() );
|
|
|
|
if( aPlotOpts->GetMirror() )
|
|
initializePlotter( plotter, aBoard, aPlotOpts );
|
|
}
|
|
|
|
/* When plotting a negative board: draw a black rectangle
|
|
* (background for plot board in white) and switch the current
|
|
* color to WHITE; note the color inversion is actually done
|
|
* in the driver (if supported) */
|
|
if( aPlotOpts->GetNegative() )
|
|
{
|
|
EDA_RECT bbox = aBoard->ComputeBoundingBox();
|
|
FillNegativeKnockout( plotter, bbox );
|
|
}
|
|
|
|
return plotter;
|
|
}
|
|
|
|
delete plotter;
|
|
return NULL;
|
|
}
|