675 lines
20 KiB
C++
675 lines
20 KiB
C++
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/*
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* This program source code file is part of KICAD, a free EDA CAD application.
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*
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* Copyright (C) 2004-2007 Jean-Pierre Charras, jean-pierre.charras@gipsa-lab.inpg.fr
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* Copyright (C) 2007 Dick Hollenbeck, dick@softplc.com
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* Copyright (C) 2007 Kicad Developers, see change_log.txt for contributors.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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/****************************/
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/* DRC control */
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/****************************/
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#include "fctsys.h"
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#include "wxPcbStruct.h"
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#include "trigo.h"
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#include "class_board_design_settings.h"
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#include "class_module.h"
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#include "class_track.h"
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#include "class_pad.h"
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#include "class_zone.h"
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#include "pcbnew.h"
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#include "protos.h"
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#include "drc_stuff.h"
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#include "dialog_drc.h"
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void DRC::ShowDialog()
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{
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if( !m_ui )
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{
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m_ui = new DIALOG_DRC_CONTROL( this, m_mainWindow );
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updatePointers();
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// copy data retained in this DRC object into the m_ui DrcPanel:
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PutValueInLocalUnits( *m_ui->m_SetTrackMinWidthCtrl,
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m_pcb->GetBoardDesignSettings()->m_TrackMinWidth,
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m_mainWindow->m_InternalUnits );
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PutValueInLocalUnits( *m_ui->m_SetViaMinSizeCtrl,
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m_pcb->GetBoardDesignSettings()->m_ViasMinSize,
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m_mainWindow->m_InternalUnits );
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PutValueInLocalUnits( *m_ui->m_SetMicroViakMinSizeCtrl,
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m_pcb->GetBoardDesignSettings()->m_MicroViasMinSize,
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m_mainWindow->m_InternalUnits );
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m_ui->m_CreateRptCtrl->SetValue( m_doCreateRptFile );
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m_ui->m_RptFilenameCtrl->SetValue( m_rptFilename );
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}
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else
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updatePointers();
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m_ui->Show( true );
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}
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void DRC::DestroyDialog( int aReason )
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{
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if( m_ui )
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{
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if( aReason == wxID_OK )
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{
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// if user clicked OK, save his choices in this DRC object.
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m_doCreateRptFile = m_ui->m_CreateRptCtrl->GetValue();
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m_rptFilename = m_ui->m_RptFilenameCtrl->GetValue();
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}
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m_ui->Destroy();
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m_ui = 0;
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}
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}
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DRC::DRC( PCB_EDIT_FRAME* aPcbWindow )
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{
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m_mainWindow = aPcbWindow;
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m_pcb = aPcbWindow->GetBoard();
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m_ui = 0;
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// establish initial values for everything:
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m_doPad2PadTest = true; // enable pad to pad clearance tests
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m_doUnconnectedTest = true; // enable unconnected tests
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m_doZonesTest = true; // enable zone to items clearance tests
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m_doCreateRptFile = false;
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// m_rptFilename set to empty by its constructor
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m_currentMarker = NULL;
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m_segmAngle = 0;
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m_segmLength = 0;
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m_xcliplo = 0;
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m_ycliplo = 0;
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m_xcliphi = 0;
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m_ycliphi = 0;
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}
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DRC::~DRC()
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{
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// maybe someday look at pointainer.h <- google for "pointainer.h"
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for( unsigned i = 0; i<m_unconnected.size(); ++i )
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delete m_unconnected[i];
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}
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int DRC::Drc( TRACK* aRefSegm, TRACK* aList )
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{
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updatePointers();
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if( !doTrackDrc( aRefSegm, aList, true ) )
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{
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wxASSERT( m_currentMarker );
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m_currentMarker->DisplayInfo( m_mainWindow );
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return BAD_DRC;
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}
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return OK_DRC;
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}
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/**
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* Function Drc
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* tests the outline segment starting at CornerIndex and returns the result and displays the error
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* in the status panel only if one exists.
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* Test Edge inside other areas
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* Test Edge too close other areas
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* @param aArea The areaparent which contains the corner.
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* @param aCornerIndex The starting point of the segment to test.
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* @return int - BAD_DRC (1) if DRC error or OK_DRC (0) if OK
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*/
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int DRC::Drc( ZONE_CONTAINER* aArea, int aCornerIndex )
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{
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updatePointers();
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if( !doEdgeZoneDrc( aArea, aCornerIndex ) )
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{
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wxASSERT( m_currentMarker );
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m_currentMarker->DisplayInfo( m_mainWindow );
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return BAD_DRC;
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}
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return OK_DRC;
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}
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/**
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* Function RunTests
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* will actually run all the tests specified with a previous call to
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* SetSettings()
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*/
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void DRC::RunTests( wxTextCtrl* aMessages )
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{
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// Ensure ratsnest is up to date:
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if( (m_pcb->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
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{
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if( aMessages )
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{
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aMessages->AppendText( _( "Compile ratsnest...\n" ) );
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wxSafeYield();
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}
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m_mainWindow->Compile_Ratsnest( NULL, true );
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}
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// someone should have cleared the two lists before calling this.
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if( !testNetClasses() )
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{
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// testing the netclasses is a special case because if the netclasses
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// do not pass the g_DesignSettings checks, then every member of a net
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// class (a NET) will cause its items such as tracks, vias, and pads
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// to also fail. So quit after *all* netclass errors have been reported.
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if( aMessages )
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aMessages->AppendText( _( "Aborting\n" ) );
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// update the m_ui listboxes
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updatePointers();
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return;
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}
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// test pad to pad clearances, nothing to do with tracks, vias or zones.
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if( m_doPad2PadTest )
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{
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if( aMessages )
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{
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aMessages->AppendText( _( "Pad clearances...\n" ) );
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wxSafeYield();
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}
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testPad2Pad();
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}
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// test track and via clearances to other tracks, pads, and vias
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if( aMessages )
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{
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aMessages->AppendText( _( "Track clearances...\n" ) );
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wxSafeYield();
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}
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testTracks();
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// Before testing segments and unconnected, refill all zones:
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// this is a good caution, because filled areas can be outdated.
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if( aMessages )
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{
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aMessages->AppendText( _( "Fill zones...\n" ) );
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wxSafeYield();
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}
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m_mainWindow->Fill_All_Zones( false );
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// test zone clearances to other zones, pads, tracks, and vias
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if( aMessages && m_doZonesTest )
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{
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aMessages->AppendText( _( "Test zones...\n" ) );
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wxSafeYield();
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}
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testZones( m_doZonesTest );
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// find and gather unconnected pads.
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if( m_doUnconnectedTest )
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{
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if( aMessages )
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{
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aMessages->AppendText( _( "Unconnected pads...\n" ) );
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wxSafeYield();
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}
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testUnconnected();
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}
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// update the m_ui listboxes
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updatePointers();
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if( aMessages )
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{
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// no newline on this one because it is last, don't want the window
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// to unnecessarily scroll.
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aMessages->AppendText( _( "Finished" ) );
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}
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}
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void DRC::ListUnconnectedPads()
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{
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testUnconnected();
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// update the m_ui listboxes
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updatePointers();
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}
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void DRC::updatePointers()
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{
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// update my pointers, m_mainWindow is the only unchangable one
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m_pcb = m_mainWindow->GetBoard();
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if( m_ui ) // Use diag list boxes only in DRC dialog
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{
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m_ui->m_ClearanceListBox->SetList( new DRC_LIST_MARKERS( m_pcb ) );
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m_ui->m_UnconnectedListBox->SetList( new DRC_LIST_UNCONNECTED( &m_unconnected ) );
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}
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}
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bool DRC::doNetClass( NETCLASS* nc, wxString& msg )
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{
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bool ret = true;
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const BOARD_DESIGN_SETTINGS& g = *m_pcb->GetBoardDesignSettings();
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#define FmtVal( x ) GetChars( ReturnStringFromValue( g_UserUnit, x, PCB_INTERNAL_UNIT ) )
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#if 0 // set to 1 when (if...) BOARD_DESIGN_SETTINGS has a m_MinClearance value
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if( nc->GetClearance() < g.m_MinClearance )
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{
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msg.Printf( _( "NETCLASS: '%s' has Clearance:%s which is less than global:%s" ),
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GetChars( nc->GetName() ),
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FmtVal( nc->GetClearance() ),
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FmtVal( g.m_TrackClearance )
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);
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m_currentMarker = fillMarker( DRCE_NETCLASS_CLEARANCE, msg, m_currentMarker );
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m_pcb->Add( m_currentMarker );
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m_currentMarker = 0;
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ret = false;
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}
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#endif
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if( nc->GetTrackWidth() < g.m_TrackMinWidth )
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{
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msg.Printf( _( "NETCLASS: '%s' has TrackWidth:%s which is less than global:%s" ),
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GetChars( nc->GetName() ),
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FmtVal( nc->GetTrackWidth() ),
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FmtVal( g.m_TrackMinWidth )
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);
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m_currentMarker = fillMarker( DRCE_NETCLASS_TRACKWIDTH, msg, m_currentMarker );
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m_pcb->Add( m_currentMarker );
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m_currentMarker = 0;
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ret = false;
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}
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if( nc->GetViaDiameter() < g.m_ViasMinSize )
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{
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msg.Printf( _( "NETCLASS: '%s' has Via Dia:%s which is less than global:%s" ),
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GetChars( nc->GetName() ),
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FmtVal( nc->GetViaDiameter() ),
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FmtVal( g.m_ViasMinSize )
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);
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m_currentMarker = fillMarker( DRCE_NETCLASS_VIASIZE, msg, m_currentMarker );
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m_pcb->Add( m_currentMarker );
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m_currentMarker = 0;
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ret = false;
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}
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if( nc->GetViaDrill() < g.m_ViasMinDrill )
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{
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msg.Printf( _( "NETCLASS: '%s' has Via Drill:%s which is less than global:%s" ),
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GetChars( nc->GetName() ),
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FmtVal( nc->GetViaDrill() ),
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FmtVal( g.m_ViasMinDrill )
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);
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m_currentMarker = fillMarker( DRCE_NETCLASS_VIADRILLSIZE, msg, m_currentMarker );
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m_pcb->Add( m_currentMarker );
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m_currentMarker = 0;
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ret = false;
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}
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if( nc->GetuViaDiameter() < g.m_MicroViasMinSize )
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{
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msg.Printf( _( "NETCLASS: '%s' has uVia Dia:%s which is less than global:%s" ),
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GetChars( nc->GetName() ),
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FmtVal( nc->GetuViaDiameter() ),
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FmtVal( g.m_MicroViasMinSize )
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);
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m_currentMarker = fillMarker( DRCE_NETCLASS_uVIASIZE, msg, m_currentMarker );
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m_pcb->Add( m_currentMarker );
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m_currentMarker = 0;
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ret = false;
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}
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if( nc->GetuViaDrill() < g.m_MicroViasMinDrill )
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{
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msg.Printf( _( "NETCLASS: '%s' has uVia Drill:%s which is less than global:%s" ),
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GetChars( nc->GetName() ),
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FmtVal( nc->GetuViaDrill() ),
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FmtVal( g.m_MicroViasMinDrill )
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);
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m_currentMarker = fillMarker( DRCE_NETCLASS_uVIADRILLSIZE, msg, m_currentMarker );
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m_pcb->Add( m_currentMarker );
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m_currentMarker = 0;
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ret = false;
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}
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return ret;
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}
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bool DRC::testNetClasses()
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{
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bool ret = true;
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NETCLASSES& netclasses = m_pcb->m_NetClasses;
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wxString msg; // construct this only once here, not in a loop, since somewhat expensive.
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if( !doNetClass( netclasses.GetDefault(), msg ) )
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ret = false;
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for( NETCLASSES::const_iterator i = netclasses.begin(); i != netclasses.end(); ++i )
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{
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NETCLASS* nc = i->second;
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if( !doNetClass( nc, msg ) )
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ret = false;
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}
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return ret;
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}
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void DRC::testPad2Pad()
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{
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std::vector<D_PAD*> sortedPads;
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m_pcb->GetSortedPadListByXCoord( sortedPads );
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// find the max size of the pads (used to stop the test)
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int max_size = 0;
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for( unsigned i = 0; i<sortedPads.size(); ++i )
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{
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D_PAD* pad = sortedPads[i];
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// m_ShapeMaxRadius is the radius value of the circle containing the pad
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if( pad->m_ShapeMaxRadius > max_size )
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max_size = pad->m_ShapeMaxRadius;
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}
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// Test the pads
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D_PAD** listEnd = &sortedPads[ sortedPads.size() ];
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for( unsigned i = 0; i<sortedPads.size(); ++i )
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{
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D_PAD* pad = sortedPads[i];
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int x_limit = max_size + pad->GetClearance() +
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pad->m_ShapeMaxRadius + pad->GetPosition().x;
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if( !doPadToPadsDrc( pad, &sortedPads[i], listEnd, x_limit ) )
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{
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wxASSERT( m_currentMarker );
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m_pcb->Add( m_currentMarker );
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m_currentMarker = 0;
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}
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}
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}
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void DRC::testTracks()
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{
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for( TRACK* segm = m_pcb->m_Track; segm && segm->Next(); segm = segm->Next() )
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{
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if( !doTrackDrc( segm, segm->Next(), true ) )
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{
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wxASSERT( m_currentMarker );
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m_pcb->Add( m_currentMarker );
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m_currentMarker = 0;
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}
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}
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}
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void DRC::testUnconnected()
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{
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if( (m_pcb->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
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{
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wxClientDC dc( m_mainWindow->DrawPanel );
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m_mainWindow->Compile_Ratsnest( &dc, true );
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}
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if( m_pcb->GetRatsnestsCount() == 0 )
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return;
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for( unsigned ii = 0; ii < m_pcb->GetRatsnestsCount(); ++ii )
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{
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RATSNEST_ITEM* rat = &m_pcb->m_FullRatsnest[ii];
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if( (rat->m_Status & CH_ACTIF) == 0 )
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continue;
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D_PAD* padStart = rat->m_PadStart;
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D_PAD* padEnd = rat->m_PadEnd;
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DRC_ITEM* uncItem = new DRC_ITEM( DRCE_UNCONNECTED_PADS,
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padStart->GetSelectMenuText(),
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padEnd->GetSelectMenuText(),
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padStart->GetPosition(), padEnd->GetPosition() );
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m_unconnected.push_back( uncItem );
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}
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}
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void DRC::testZones( bool adoTestFillSegments )
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{
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// Test copper areas for valid netcodes
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// if a netcode is < 0 the netname was not found when reading a netlist
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// if a netcode is == 0 the netname is void, and the zone is not connected.
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// This is allowed, but i am not sure this is a good idea
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for( int ii = 0; ii < m_pcb->GetAreaCount(); ii++ )
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{
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ZONE_CONTAINER* Area_To_Test = m_pcb->GetArea( ii );
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if( !Area_To_Test->IsOnCopperLayer() )
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continue;
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if( Area_To_Test->GetNet() < 0 )
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{
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m_currentMarker = fillMarker( Area_To_Test,
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DRCE_NON_EXISTANT_NET_FOR_ZONE_OUTLINE, m_currentMarker );
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m_pcb->Add( m_currentMarker );
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m_currentMarker = 0;
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}
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}
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// Test copper areas outlines, and create markers when needed
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m_pcb->Test_Drc_Areas_Outlines_To_Areas_Outlines( NULL, true );
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TRACK* zoneSeg;
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if( !adoTestFillSegments )
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return;
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// m_pcb->m_Zone is fully obsolete. Keep this test for compatibility
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// with old designs. Will be removed on day
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for( zoneSeg = m_pcb->m_Zone; zoneSeg && zoneSeg->Next(); zoneSeg = zoneSeg->Next() )
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{
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// Test zoneSeg with other zone segments and with all pads
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if( !doTrackDrc( zoneSeg, zoneSeg->Next(), true ) )
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{
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wxASSERT( m_currentMarker );
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m_pcb->Add( m_currentMarker );
|
|
m_currentMarker = 0;
|
|
}
|
|
|
|
// Pads already tested: disable pad test
|
|
|
|
bool rc = doTrackDrc( zoneSeg, m_pcb->m_Track, false );
|
|
|
|
if( !rc )
|
|
{
|
|
wxASSERT( m_currentMarker );
|
|
m_pcb->Add( m_currentMarker );
|
|
m_currentMarker = 0;
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
bool DRC::doPadToPadsDrc( D_PAD* aRefPad, D_PAD** aStart, D_PAD** aEnd, int x_limit )
|
|
{
|
|
int layerMask = aRefPad->m_layerMask & ALL_CU_LAYERS;
|
|
|
|
/* used to test DRC pad to holes: this dummy pad has the size and shape of the hole
|
|
* to test pad to pad hole DRC, using the pad to pad DRC test function.
|
|
* Therefore, this dummy pad is a circle or an oval.
|
|
* A pad must have a parent because some functions expect a non null parent
|
|
* to find the parent board, and some other data
|
|
*/
|
|
MODULE dummymodule( m_pcb ); // Creates a dummy parent
|
|
D_PAD dummypad( &dummymodule );
|
|
dummypad.m_layerMask |= ALL_CU_LAYERS; // Ensure the hole is on all copper layers
|
|
dummypad.m_LocalClearance = 1; /* Use the minimal local clearance value for the dummy pad
|
|
* the clearance of the active pad will be used
|
|
* as minimum distance to a hole
|
|
* (a value = 0 means use netclass value)
|
|
*/
|
|
|
|
for( D_PAD** pad_list = aStart; pad_list<aEnd; ++pad_list )
|
|
{
|
|
D_PAD* pad = *pad_list;
|
|
|
|
if( pad == aRefPad )
|
|
continue;
|
|
|
|
// We can stop the test when pad->m_Pos.x > x_limit
|
|
// because the list is sorted by X values
|
|
if( pad->m_Pos.x > x_limit )
|
|
break;
|
|
|
|
// No problem if pads are on different copper layers,
|
|
// but their hole (if any ) can create DRC error because they are on all
|
|
// copper layers, so we test them
|
|
if( ( pad->m_layerMask & layerMask ) == 0 )
|
|
{
|
|
// if holes are in the same location and have the same size and shape,
|
|
// this can be accepted
|
|
if( pad->GetPosition() == aRefPad->GetPosition()
|
|
&& pad->m_Drill == aRefPad->m_Drill
|
|
&& pad->m_DrillShape == aRefPad->m_DrillShape )
|
|
{
|
|
if( aRefPad->m_DrillShape == PAD_CIRCLE )
|
|
continue;
|
|
|
|
// for oval holes: must also have the same orientation
|
|
if( pad->m_Orient == aRefPad->m_Orient )
|
|
continue;
|
|
}
|
|
|
|
/* Here, we must test clearance between holes and pads
|
|
* dummy pad size and shape is adjusted to pad drill size and shape
|
|
*/
|
|
if( pad->m_Drill.x )
|
|
{
|
|
// pad under testing has a hole, test this hole against pad reference
|
|
dummypad.SetPosition( pad->GetPosition() );
|
|
dummypad.m_Size = pad->m_Drill;
|
|
dummypad.m_PadShape = (pad->m_DrillShape == PAD_OVAL) ? PAD_OVAL : PAD_CIRCLE;
|
|
dummypad.m_Orient = pad->m_Orient;
|
|
|
|
// compute the radius of the circle containing this pad
|
|
dummypad.ComputeShapeMaxRadius();
|
|
|
|
if( !checkClearancePadToPad( aRefPad, &dummypad ) )
|
|
{
|
|
// here we have a drc error on pad!
|
|
m_currentMarker = fillMarker( pad, aRefPad,
|
|
DRCE_HOLE_NEAR_PAD, m_currentMarker );
|
|
return false;
|
|
}
|
|
}
|
|
|
|
if( aRefPad->m_Drill.x ) // pad reference has a hole
|
|
{
|
|
dummypad.SetPosition( aRefPad->GetPosition() );
|
|
dummypad.m_Size = aRefPad->m_Drill;
|
|
dummypad.m_PadShape = (aRefPad->m_DrillShape == PAD_OVAL) ? PAD_OVAL : PAD_CIRCLE;
|
|
dummypad.m_Orient = aRefPad->m_Orient;
|
|
|
|
// compute the radius of the circle containing this pad
|
|
dummypad.ComputeShapeMaxRadius();
|
|
|
|
if( !checkClearancePadToPad( pad, &dummypad ) )
|
|
{
|
|
// here we have a drc error on aRefPad!
|
|
m_currentMarker = fillMarker( aRefPad, pad,
|
|
DRCE_HOLE_NEAR_PAD, m_currentMarker );
|
|
return false;
|
|
}
|
|
}
|
|
|
|
continue;
|
|
}
|
|
|
|
|
|
// The pad must be in a net (i.e pt_pad->GetNet() != 0 ),
|
|
// But no problem if pads have the same netcode (same net)
|
|
if( pad->GetNet() && ( aRefPad->GetNet() == pad->GetNet() ) )
|
|
continue;
|
|
|
|
// if pads are from the same footprint
|
|
if( pad->GetParent() == aRefPad->GetParent() )
|
|
{
|
|
// and have the same pad number ( equivalent pads )
|
|
|
|
// one can argue that this 2nd test is not necessary, that any
|
|
// two pads from a single module are acceptable. This 2nd test
|
|
// should eventually be a configuration option.
|
|
if( pad->m_NumPadName == aRefPad->m_NumPadName )
|
|
continue;
|
|
}
|
|
|
|
if( !checkClearancePadToPad( aRefPad, pad ) )
|
|
{
|
|
// here we have a drc error!
|
|
m_currentMarker = fillMarker( aRefPad, pad, DRCE_PAD_NEAR_PAD1, m_currentMarker );
|
|
return false;
|
|
}
|
|
}
|
|
|
|
return true;
|
|
}
|