xilinx 7-series fpga tools i made
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#!/usr/bin/env python3
import sys
import struct
WORD_BE = struct.Struct(">I")
WORD_LE = struct.Struct("<I")
if __name__ == "__main__":
if len(sys.argv) < 3:
print("usage: xilswap.py <in> <out>")
with open(sys.argv[1], "rb") as f:
data = f.read()
assert(len(data) % 4 == 0)
print("total", len(data)//4)
with open(sys.argv[2], "wb") as f:
for i in range(len(data)//4):
word = WORD_BE.unpack(data[i*4:i*4+4])[0]
f.write(WORD_LE.pack(word))
if i % 10000 == 0:
print(i, "/", len(data)//4)