spi stuff
This commit is contained in:
parent
5c17820a52
commit
0f4566d0e7
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@ -5,7 +5,7 @@
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#define DBOARD_HAS_UART
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#define DBOARD_HAS_CMSISDAP
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// TODO: rename to _SPI
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#define DBOARD_HAS_SERPROG
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#define DBOARD_HAS_SPI
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#define DBOARD_HAS_I2C
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#define DBOARD_HAS_TEMPSENSOR
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@ -27,7 +27,7 @@ enum {
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};
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enum {
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#if CFG_TUD_VENDOR > 0
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VND_CFG = 0,
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VND_N_CFG = 0,
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#endif
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VND_N__NITF
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@ -13,10 +13,15 @@
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static bool cs_asserted;
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static uint32_t freq;
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static enum serprog_flags sflags;
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void sp_spi_init(void) {
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cs_asserted = false;
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spi_init(PINOUT_SPI_DEV, 512 * 1000); // default to 512 kHz
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freq = 512*1000; // default to 512 kHz
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sflags = 0; // CPOL 0, CPHA 0, 8bit
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spi_init(PINOUT_SPI_DEV, freq);
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gpio_set_function(PINOUT_SPI_MISO, GPIO_FUNC_SPI);
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gpio_set_function(PINOUT_SPI_MOSI, GPIO_FUNC_SPI);
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@ -32,6 +37,8 @@ void sp_spi_init(void) {
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}
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void sp_spi_deinit(void) {
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cs_asserted = false;
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sflags = 0;
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freq = 512*1000;
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gpio_set_function(PINOUT_SPI_MISO, GPIO_FUNC_NULL);
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gpio_set_function(PINOUT_SPI_MOSI, GPIO_FUNC_NULL);
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@ -43,32 +50,52 @@ void sp_spi_deinit(void) {
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spi_deinit(PINOUT_SPI_DEV);
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}
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uint32_t __not_in_flash_func(sp_spi_set_freq)(uint32_t freq_wanted) {
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return spi_set_baudrate(PINOUT_SPI_DEV, freq_wanted);
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freq = spi_set_baudrate(PINOUT_SPI_DEV, freq_wanted);
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return freq;
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}
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void __not_in_flash_func(sp_spi_cs_deselect)(void) {
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void __not_in_flash_func(sp_spi_set_flags)(enum serprog_flags flags) {
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sflags = flags;
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spi_set_format(PINOUT_SPI_DEV, (flags & S_FLG_16BIT) ? 16 : 8,
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(flags & S_FLG_CPOL) ? SPI_CPOL_1 : SPI_CPOL_0,
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(flags & S_FLG_CPHA) ? SPI_CPHA_1 : SPI_CPHA_0,
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SPI_MSB_FIRST);
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}
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__attribute__((__const__))
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int __not_in_flash_func(sp_spi_get_num_cs)(void) { return 1; }
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void __not_in_flash_func(sp_spi_cs_deselect)(uint8_t csflags) {
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(void)csflags;
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asm volatile("nop\nnop\nnop"); // idk if this is needed
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gpio_put(PINOUT_SPI_nCS, 1);
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asm volatile("nop\nnop\nnop"); // idk if this is needed
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cs_asserted = false;
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}
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void __not_in_flash_func(sp_spi_cs_select)(void) {
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void __not_in_flash_func(sp_spi_cs_select)(uint8_t csflags) {
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(void)csflags;
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asm volatile("nop\nnop\nnop"); // idk if this is needed
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gpio_put(PINOUT_SPI_nCS, 0);
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asm volatile("nop\nnop\nnop"); // idk if this is needed
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cs_asserted = true;
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}
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void __not_in_flash_func(sp_spi_op_begin)(void) {
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// sp_spi_cs_select();
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void __not_in_flash_func(sp_spi_op_begin)(uint8_t csflags) {
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// sp_spi_cs_select(csflags);
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(void)csflags;
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if (!cs_asserted) {
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asm volatile("nop\nnop\nnop"); // idk if this is needed
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gpio_put(PINOUT_SPI_nCS, 0);
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asm volatile("nop\nnop\nnop"); // idk if this is needed
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}
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}
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void __not_in_flash_func(sp_spi_op_end)(void) {
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// sp_spi_cs_deselect();
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void __not_in_flash_func(sp_spi_op_end)(uint8_t csflags) {
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// sp_spi_cs_deselect(csflags);
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(void)csflags;
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if (!cs_asserted) { // YES, this condition is the intended one!
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asm volatile("nop\nnop\nnop"); // idk if this is needed
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gpio_put(PINOUT_SPI_nCS, 1);
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@ -77,10 +104,29 @@ void __not_in_flash_func(sp_spi_op_end)(void) {
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}
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// TODO: use dma?
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void __not_in_flash_func(sp_spi_op_write)(uint32_t write_len, const uint8_t* write_data) {
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spi_write_blocking(PINOUT_SPI_DEV, write_data, write_len);
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// TODO: routines for non-8/16-bit xfers??
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void __not_in_flash_func(sp_spi_op_write)(uint32_t write_len, const void* write_data) {
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if (sflags & S_FLG_16BIT) {
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spi_write16_blocking(PINOUT_SPI_DEV, (const uint16_t*)write_data, write_len >> 1);
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} else {
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spi_write_blocking(PINOUT_SPI_DEV, (const uint8_t*)write_data, write_len);
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}
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}
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void __not_in_flash_func(sp_spi_op_read)(uint32_t read_len, void* read_data) {
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if (sflags & S_FLG_16BIT) {
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spi_read16_blocking(PINOUT_SPI_DEV, 0, (uint16_t*)read_data, read_len >> 1);
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} else {
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spi_read_blocking(PINOUT_SPI_DEV, 0, (uint8_t*)read_data, read_len);
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}
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}
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void __not_in_flash_func(sp_spi_op_read_write)(uint32_t len, void* read_data,
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const void* write_data) {
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if (sflags & S_FLG_16BIT) {
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spi_write16_read16_blocking(PINOUT_SPI_DEV, (const uint16_t*)write_data,
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(uint16_t*)read_data, len >> 1);
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} else {
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spi_write_read_blocking(PINOUT_SPI_DEV, (const uint8_t*)write_data,
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(uint8_t*)read_data, len);
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}
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void __not_in_flash_func(sp_spi_op_read)(uint32_t read_len, uint8_t* read_data) {
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spi_read_blocking(PINOUT_SPI_DEV, 0, read_data, read_len);
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}
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@ -55,7 +55,7 @@ static void uart_thread_fn(void) {
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}
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#endif
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#ifdef DBOARD_HAS_SERPROG
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#ifdef DBOARD_HAS_SPI
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static cothread_t serprogthread;
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static uint8_t serprogstack[THREAD_STACK_SIZE];
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@ -82,7 +82,7 @@ static void enter_cb(void) {
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uartthread = co_derive(uartstack, sizeof uartstack, uart_thread_fn);
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thread_enter(uartthread); // will call cdc_uart_init() on correct thread
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#endif
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#ifdef DBOARD_HAS_SERPROG
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#ifdef DBOARD_HAS_SPI
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serprogthread = co_derive(serprogstack, sizeof serprogstack, serprog_thread_fn);
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thread_enter(serprogthread); // will call cdc_serprog_init() on correct thread
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#endif
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@ -95,7 +95,7 @@ static void leave_cb(void) {
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#ifdef DBOARD_HAS_UART
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cdc_uart_deinit();
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#endif
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#ifdef DBOARD_HAS_SERPROG
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#ifdef DBOARD_HAS_SPI
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cdc_serprog_deinit();
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#endif
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}
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@ -105,7 +105,7 @@ static void task_cb(void) {
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tud_task();
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thread_enter(uartthread);
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#endif
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#ifdef DBOARD_HAS_SERPROG
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#ifdef DBOARD_HAS_SPI
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tud_task();
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thread_enter(serprogthread);
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#endif
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@ -122,7 +122,7 @@ static void handle_cmd_cb(uint8_t cmd) {
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#ifdef DBOARD_HAS_CMSISDAP
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resp |= mdef_feat_cmsisdap;
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#endif
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#ifdef DBOARD_HAS_SERPROG
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#ifdef DBOARD_HAS_SPI
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resp |= mdef_feat_spi;
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#endif
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#ifdef DBOARD_HAS_I2C
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@ -134,7 +134,7 @@ static void handle_cmd_cb(uint8_t cmd) {
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vnd_cfg_write_resp(cfg_resp_ok, 1, &resp);
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break;
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case mdef_cmd_spi:
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#ifdef DBOARD_HAS_SERPROG
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#ifdef DBOARD_HAS_SPI
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sp_spi_bulk_cmd();
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#else
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vnd_cfg_write_resp(cfg_resp_illcmd, 0, NULL);
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@ -194,7 +194,7 @@ enum {
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ITF_NUM_CDC_UART_COM,
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ITF_NUM_CDC_UART_DATA,
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#endif
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#ifdef DBOARD_HAS_SERPROG
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#ifdef DBOARD_HAS_SPI
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ITF_NUM_CDC_SERPROG_COM,
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ITF_NUM_CDC_SERPROG_DATA,
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#endif
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@ -220,7 +220,7 @@ enum {
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#ifdef DBOARD_HAS_UART
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+ TUD_CDC_DESC_LEN
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#endif
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#ifdef DBOARD_HAS_SERPROG
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#ifdef DBOARD_HAS_SPI
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+ TUD_CDC_DESC_LEN
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#endif
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#ifdef USE_USBCDC_FOR_STDIO
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@ -265,7 +265,7 @@ static const uint8_t desc_configuration[] = {
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#if CFG_TUD_VENDOR > 0
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TUD_VENDOR_DESCRIPTOR(ITF_NUM_VND_CFG, STRID_IF_VND_CFG, EPNUM_VND_CFG_OUT,
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EPNUM_VND_CFG_IN, 64),
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EPNUM_VND_CFG_IN, CFG_TUD_VENDOR_RX_BUFSIZE),
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#endif
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#if defined(DBOARD_HAS_I2C) && defined(MODE_ENABLE_I2CTINYUSB)
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@ -279,18 +279,18 @@ static const uint8_t desc_configuration[] = {
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#endif
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#ifdef DBOARD_HAS_UART
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TUD_CDC_DESCRIPTOR(ITF_NUM_CDC_UART_COM, STRID_IF_CDC_UART, EPNUM_CDC_UART_NOTIF, 64,
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EPNUM_CDC_UART_OUT, EPNUM_CDC_UART_IN, 64),
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TUD_CDC_DESCRIPTOR(ITF_NUM_CDC_UART_COM, STRID_IF_CDC_UART, EPNUM_CDC_UART_NOTIF,
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CFG_TUD_CDC_RX_BUFSIZE, EPNUM_CDC_UART_OUT, EPNUM_CDC_UART_IN, CFG_TUD_CDC_RX_BUFSIZE),
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#endif
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#ifdef DBOARD_HAS_SERPROG
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#ifdef DBOARD_HAS_SPI
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TUD_CDC_DESCRIPTOR(ITF_NUM_CDC_SERPROG_COM, STRID_IF_CDC_SERPROG, EPNUM_CDC_SERPROG_NOTIF,
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64, EPNUM_CDC_SERPROG_OUT, EPNUM_CDC_SERPROG_IN, 64),
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CFG_TUD_CDC_RX_BUFSIZE, EPNUM_CDC_SERPROG_OUT, EPNUM_CDC_SERPROG_IN, CFG_TUD_CDC_RX_BUFSIZE),
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#endif
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#ifdef USE_USBCDC_FOR_STDIO
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TUD_CDC_DESCRIPTOR(ITF_NUM_CDC_STDIO_COM, STRID_IF_CDC_STDIO, EPNUM_CDC_STDIO_NOTIF, 64,
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EPNUM_CDC_STDIO_OUT, EPNUM_CDC_STDIO_IN, 64),
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TUD_CDC_DESCRIPTOR(ITF_NUM_CDC_STDIO_COM, STRID_IF_CDC_STDIO, EPNUM_CDC_STDIO_NOTIF,
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CFG_TUD_CDC_RX_BUFSIZE, EPNUM_CDC_STDIO_OUT, EPNUM_CDC_STDIO_IN, CFG_TUD_CDC_RX_BUFSIZE),
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#endif
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};
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static const char* string_desc_arr[] = {
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@ -6,7 +6,7 @@
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#include "m_default/bsp-feature.h"
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#ifdef DBOARD_HAS_SERPROG
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#ifdef DBOARD_HAS_SPI
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#include "info.h"
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#include "util.h"
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@ -20,6 +20,11 @@ static const uint8_t serprog_cmdmap[32] = {
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0x3f, // cmd 00..05 not 0x06 (Q_CHIPSIZE) and 0x07 (Q_OPBUF), as this is a SPI-only device
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0x01, // only cmd 08
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0x1f, // cmd 10..15 supported
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0, // 18..1f
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0, // 20..27
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0, // 28..2f
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0, // 30..37
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0x3f, // cmd 40..45
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0, // rest is 0
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};
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// clang-format on
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@ -29,10 +34,12 @@ static uint8_t rx_buf[CFG_TUD_CDC_RX_BUFSIZE];
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static uint8_t tx_buf[CFG_TUD_CDC_TX_BUFSIZE];
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static uint32_t rxavail, rxpos;
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static uint8_t selchip;
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void cdc_serprog_init(void) {
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rxavail = 0;
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rxpos = 0;
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selchip = 1;
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sp_spi_init();
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}
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@ -41,9 +48,15 @@ void cdc_serprog_deinit(void) {
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rxavail = 0;
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rxpos = 0;
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selchip = 1;
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}
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static uint8_t read_byte(void) {
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__attribute__((__const__))
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uint32_t sp_spi_get_buf_limit(void) {
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return sizeof(rx_buf) - 1;
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}
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static uint8_t read_byte_cdc(void) {
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while (rxavail <= 0) {
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if (!tud_cdc_n_connected(CDC_N_SERPROG) || !tud_cdc_n_available(CDC_N_SERPROG)) {
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thread_yield();
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@ -62,10 +75,13 @@ static uint8_t read_byte(void) {
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return rv;
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}
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static void handle_cmd(void) {
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uint32_t nresp = 0;
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static uint32_t nresp = 0;
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static void handle_cmd(uint8_t cmd, int ud, uint8_t (*read_byte)(void),
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void (*writepkt)(int ud, const uint8_t* buf, uint32_t len),
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void (*flushpkt)(int ud),
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void (*writehdr)(enum cfg_resp stat, uint32_t len, const void* data)) {
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nresp = 0;
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uint8_t cmd = read_byte();
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switch (cmd) {
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case S_CMD_NOP:
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tx_buf[0] = S_ACK;
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@ -104,17 +120,19 @@ static void handle_cmd(void) {
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nresp = 2;
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break;
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case S_CMD_Q_WRNMAXLEN:
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nresp = sp_spi_get_buf_limit();
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tx_buf[0] = S_ACK;
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tx_buf[1] = (sizeof(tx_buf) - 1) & 0xff;
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tx_buf[2] = ((sizeof(tx_buf) - 1) >> 8) & 0xff;
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tx_buf[3] = ((sizeof(tx_buf) - 1) >> 16) & 0xff;
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tx_buf[1] = nresp & 0xff;
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tx_buf[2] = (nresp >> 8) & 0xff;
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tx_buf[3] = (nresp >> 16) & 0xff;
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nresp = 4;
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break;
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case S_CMD_Q_RDNMAXLEN:
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nresp = sp_spi_get_buf_limit();
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tx_buf[0] = S_ACK;
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tx_buf[1] = (sizeof(rx_buf) - 1) & 0xff;
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tx_buf[2] = ((sizeof(rx_buf) - 1) >> 8) & 0xff;
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tx_buf[3] = ((sizeof(rx_buf) - 1) >> 16) & 0xff;
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tx_buf[1] = nresp & 0xff;
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tx_buf[2] = (nresp >> 8) & 0xff;
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tx_buf[3] = (nresp >> 16) & 0xff;
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nresp = 4;
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break;
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case S_CMD_S_BUSTYPE:
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@ -126,58 +144,6 @@ static void handle_cmd(void) {
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nresp = 1;
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break;
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case S_CMD_SPIOP: {
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uint32_t slen, rlen;
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// clang-format off
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slen = (uint32_t)read_byte();
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slen |= (uint32_t)read_byte() << 8;
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slen |= (uint32_t)read_byte() << 16;
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rlen = (uint32_t)read_byte();
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rlen |= (uint32_t)read_byte() << 8;
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rlen |= (uint32_t)read_byte() << 16;
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// clang-format on
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sp_spi_op_begin();
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size_t this_batch;
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// 1. write slen data bytes
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// we're going to use the tx buf for all operations here
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while (slen > 0) {
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this_batch = sizeof(tx_buf);
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if (this_batch > slen) this_batch = slen;
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for (size_t i = 0; i < this_batch; ++i) tx_buf[i] = read_byte();
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sp_spi_op_write(this_batch, tx_buf);
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slen -= this_batch;
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}
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// 2. write data
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// first, do a batch of 63, because we also need to send an ACK byte
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this_batch = sizeof(tx_buf) - 1;
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if (this_batch > rlen) this_batch = rlen;
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sp_spi_op_read(this_batch, &tx_buf[1]);
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tx_buf[0] = S_ACK;
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tud_cdc_n_write(CDC_N_SERPROG, tx_buf, this_batch + 1);
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rlen -= this_batch;
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// now do in batches of 64
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while (rlen > 0) {
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this_batch = sizeof(tx_buf);
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if (this_batch > rlen) this_batch = rlen;
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sp_spi_op_read(this_batch, tx_buf);
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tud_cdc_n_write(CDC_N_SERPROG, tx_buf, this_batch);
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rlen -= this_batch;
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}
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tud_cdc_n_write_flush(CDC_N_SERPROG);
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// that's it!
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sp_spi_op_end();
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nresp = 0; // we sent our own response manually
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} break;
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case S_CMD_S_SPI_FREQ: {
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uint32_t freq;
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// clang-format off
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||||
|
@ -198,19 +164,134 @@ static void handle_cmd(void) {
|
|||
} break;
|
||||
case S_CMD_S_PINSTATE: {
|
||||
if (read_byte() == 0)
|
||||
sp_spi_cs_deselect();
|
||||
sp_spi_cs_deselect(selchip);
|
||||
else
|
||||
sp_spi_cs_select();
|
||||
sp_spi_cs_select(selchip);
|
||||
|
||||
tx_buf[0] = S_ACK;
|
||||
nresp = 1;
|
||||
} break;
|
||||
|
||||
case S_CMD_Q_NUM_CS:
|
||||
tx_buf[0] = S_ACK;
|
||||
tx_buf[1] = sp_spi_get_num_cs();
|
||||
nresp = 2;
|
||||
break;
|
||||
case S_CMD_S_SPI_FLAGS:
|
||||
sp_spi_set_flags(read_byte());
|
||||
tx_buf[0] = S_ACK;
|
||||
nresp = 1;
|
||||
break;
|
||||
case S_CMD_S_SPI_CHIPN:
|
||||
selchip = read_byte();
|
||||
tx_buf[0] = S_ACK;
|
||||
nresp = 1;
|
||||
break;
|
||||
|
||||
case S_CMD_SPIOP: case S_CMD_SPI_READ: case S_CMD_SPI_WRITE: {
|
||||
uint32_t slen, rlen;
|
||||
|
||||
// clang-format off
|
||||
slen = (uint32_t)read_byte();
|
||||
slen |= (uint32_t)read_byte() << 8;
|
||||
slen |= (uint32_t)read_byte() << 16;
|
||||
rlen = (uint32_t)read_byte();
|
||||
rlen |= (uint32_t)read_byte() << 8;
|
||||
rlen |= (uint32_t)read_byte() << 16;
|
||||
// clang-format on
|
||||
|
||||
if (writehdr)
|
||||
writehdr(cfg_resp_ok, rlen+1, NULL);
|
||||
|
||||
sp_spi_op_begin(selchip);
|
||||
size_t this_batch;
|
||||
|
||||
// 1. write slen data bytes
|
||||
// we're going to use the tx buf for all operations here
|
||||
if (cmd == S_CMD_SPIOP || cmd == S_CMD_SPI_WRITE) {
|
||||
while (slen > 0) {
|
||||
this_batch = sizeof(tx_buf);
|
||||
if (this_batch > slen) this_batch = slen;
|
||||
|
||||
for (size_t i = 0; i < this_batch; ++i) tx_buf[i] = read_byte();
|
||||
sp_spi_op_write(this_batch, tx_buf);
|
||||
|
||||
slen -= this_batch;
|
||||
}
|
||||
}
|
||||
|
||||
// 2. read data
|
||||
// first, do a batch of 63, because we also need to send an ACK byte
|
||||
if (cmd == S_CMD_SPIOP || cmd == S_CMD_SPI_READ) {
|
||||
this_batch = sizeof(tx_buf) - 1;
|
||||
if (this_batch > rlen) this_batch = rlen;
|
||||
sp_spi_op_read(this_batch, &tx_buf[1]);
|
||||
tx_buf[0] = S_ACK;
|
||||
writepkt(ud, tx_buf, this_batch + 1);
|
||||
rlen -= this_batch;
|
||||
|
||||
// now do in batches of 64
|
||||
while (rlen > 0) {
|
||||
this_batch = sizeof(tx_buf);
|
||||
if (this_batch > rlen) this_batch = rlen;
|
||||
|
||||
sp_spi_op_read(this_batch, tx_buf);
|
||||
writepkt(ud, tx_buf, this_batch);
|
||||
|
||||
rlen -= this_batch;
|
||||
}
|
||||
flushpkt(ud);
|
||||
}
|
||||
|
||||
// that's it!
|
||||
sp_spi_op_end(selchip);
|
||||
nresp = 0; // we sent our own response manually
|
||||
} break;
|
||||
case S_CMD_SPI_RDWR: {
|
||||
uint32_t len;
|
||||
|
||||
// clang-format off
|
||||
len = (uint32_t)read_byte();
|
||||
len |= (uint32_t)read_byte() << 8;
|
||||
len |= (uint32_t)read_byte() << 16;
|
||||
// clang-format on
|
||||
|
||||
sp_spi_op_begin(selchip);
|
||||
size_t this_batch;
|
||||
|
||||
// first, do a batch of 63, because we also need to send an ACK byte
|
||||
this_batch = sizeof(tx_buf) - 1;
|
||||
if (this_batch > len) this_batch = len;
|
||||
for (size_t i = 0; i < this_batch; ++i) rx_buf[i] = read_byte();
|
||||
sp_spi_op_read_write(this_batch, &tx_buf[1], rx_buf);
|
||||
tx_buf[0] = S_ACK;
|
||||
writepkt(ud, tx_buf, this_batch + 1);
|
||||
len -= this_batch;
|
||||
|
||||
// now do in batches of 64
|
||||
while (len > 0) {
|
||||
this_batch = sizeof(tx_buf);
|
||||
if (this_batch > len) this_batch = len;
|
||||
|
||||
for (size_t i = 0; i < this_batch; ++i) rx_buf[i] = read_byte();
|
||||
sp_spi_op_read_write(this_batch, tx_buf, rx_buf);
|
||||
writepkt(ud, tx_buf, this_batch);
|
||||
|
||||
len -= this_batch;
|
||||
}
|
||||
} break;
|
||||
|
||||
default:
|
||||
tx_buf[0] = S_NAK;
|
||||
nresp = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void cdc_serprog_task(void) {
|
||||
uint8_t cmd = read_byte_cdc();
|
||||
handle_cmd(cmd, CDC_N_SERPROG, read_byte_cdc,
|
||||
tud_cdc_n_write, tud_cdc_n_write_flush, NULL);
|
||||
|
||||
if (nresp > 0) {
|
||||
tud_cdc_n_write(CDC_N_SERPROG, tx_buf, nresp);
|
||||
|
@ -218,12 +299,32 @@ static void handle_cmd(void) {
|
|||
}
|
||||
}
|
||||
|
||||
void cdc_serprog_task(void) { handle_cmd(); }
|
||||
|
||||
static void vnd_writepkt(int ud, const uint8_t* buf, uint32_t len) {
|
||||
(void)ud;
|
||||
|
||||
for (size_t i = 0; i < len; ++i) vnd_cfg_write_byte(buf[i]);
|
||||
}
|
||||
static void vnd_flushpkt(int ud) {
|
||||
(void)ud;
|
||||
|
||||
vnd_cfg_write_flush();
|
||||
}
|
||||
void sp_spi_bulk_cmd(void) {
|
||||
// TODO
|
||||
vnd_cfg_write_resp(cfg_resp_illcmd, 0, NULL);
|
||||
uint8_t cmd = read_byte_cdc();
|
||||
handle_cmd(cmd, VND_N_CFG, vnd_cfg_read_byte, vnd_writepkt, vnd_flushpkt,
|
||||
vnd_cfg_write_resp);
|
||||
|
||||
if (nresp > 0) {
|
||||
enum cfg_resp stat = cfg_resp_ok;
|
||||
if (nresp == 1 && tx_buf[0] == S_NAK) // invalid cmd
|
||||
stat = cfg_resp_illcmd;
|
||||
|
||||
vnd_cfg_write_resp(stat, nresp, tx_buf);
|
||||
} else {
|
||||
// hanlded using the writehdr callback
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* DBOARD_HAS_SERPROG */
|
||||
#endif /* DBOARD_HAS_SPI */
|
||||
|
||||
|
|
|
@ -27,35 +27,57 @@ enum serprog_cmd {
|
|||
S_CMD_S_SPI_FREQ = 0x14,
|
||||
S_CMD_S_PINSTATE = 0x15,
|
||||
|
||||
S_CMD_MAGIC_SETTINGS = 0x53
|
||||
// TODO: upstream this to flashrom? could be useful to others maybe
|
||||
S_CMD_Q_NUM_CS = 0x40,
|
||||
S_CMD_S_SPI_FLAGS = 0x41,
|
||||
// number of chip (well, bitflags) to use when asserting/deasserting the chip select line
|
||||
S_CMD_S_SPI_CHIPN = 0x42,
|
||||
S_CMD_SPI_READ = 0x43,
|
||||
S_CMD_SPI_WRITE = 0x44,
|
||||
// as opposed to S_CMD_SPIOP, this one is full-duplex instead of half-duplex
|
||||
S_CMD_SPI_RDWR = 0x45,
|
||||
};
|
||||
|
||||
enum serprog_response { S_ACK = 0x06, S_NAK = 0x15 };
|
||||
|
||||
enum serprog_flags {
|
||||
S_FLG_CPOL = 1<<0, // 1: clock polarity 1, else clkpol 0
|
||||
S_FLG_CPHA = 1<<1, // 1: clock phase 1, else clkpha 1
|
||||
S_FLG_16BIT = 1<<2, // 1: 16-bit transfers, else 8-bit xfers
|
||||
};
|
||||
|
||||
#define SERPROG_IFACE_VERSION 0x0001
|
||||
|
||||
#ifdef DBOARD_HAS_SERPROG
|
||||
#ifdef DBOARD_HAS_SPI
|
||||
/* functions to be implemented by the BSP */
|
||||
uint32_t /*freq_applied*/ sp_spi_set_freq(uint32_t freq_wanted);
|
||||
|
||||
void sp_spi_set_flags(enum serprog_flags flags);
|
||||
__attribute__((__const__)) int sp_spi_get_num_cs(void);
|
||||
|
||||
void sp_spi_init(void);
|
||||
void sp_spi_deinit(void);
|
||||
void sp_spi_cs_deselect(void);
|
||||
void sp_spi_cs_select(void);
|
||||
void sp_spi_op_begin(void);
|
||||
void sp_spi_op_write(uint32_t write_len, const uint8_t* write_data);
|
||||
void sp_spi_op_read(uint32_t read_len, uint8_t* read_data);
|
||||
void sp_spi_op_end(void);
|
||||
void sp_spi_cs_deselect(uint8_t csflags);
|
||||
void sp_spi_cs_select(uint8_t csflags);
|
||||
|
||||
static inline void sp_spi_op_do(
|
||||
uint32_t write_len, const uint8_t* write_data, uint32_t read_len, uint8_t* read_data) {
|
||||
void sp_spi_op_write(uint32_t write_len, const void* write_data);
|
||||
void sp_spi_op_read(uint32_t read_len, void* read_data);
|
||||
void sp_spi_op_read_write(uint32_t len, void* read_data, const void* write_data);
|
||||
|
||||
/* serprog-specific */
|
||||
void sp_spi_op_begin(uint8_t csflags);
|
||||
void sp_spi_op_end(uint8_t csflags);
|
||||
// half-duplex
|
||||
/*static inline void sp_spi_op_do(uint32_t write_len, const uint8_t* write_data,
|
||||
uint32_t read_len, uint8_t* read_data) {
|
||||
sp_spi_op_begin();
|
||||
sp_spi_op_write(write_len, write_data);
|
||||
sp_spi_op_write(read_len, read_data);
|
||||
sp_spi_op_end();
|
||||
}
|
||||
}*/
|
||||
|
||||
/* protocol handling functions */
|
||||
__attribute__((__const__)) uint32_t sp_spi_get_buf_limit(void); // rdnmaxlen, wrnmaxlen
|
||||
void cdc_serprog_init(void);
|
||||
void cdc_serprog_deinit(void);
|
||||
void cdc_serprog_task(void);
|
||||
|
|
|
@ -105,7 +105,6 @@ int tempsense_do_read(int length, uint8_t* buf) {
|
|||
int i;
|
||||
for (i = 0; i < length; ++i, ++index) {
|
||||
switch (reg) {
|
||||
// TODO: big or little endian? seems to be big
|
||||
case cap: buf[index] = 0; break;
|
||||
case config:
|
||||
if (index == 0)
|
||||
|
@ -273,21 +272,25 @@ void tempsense_bulk_cmd(void) {
|
|||
resp[0] = temp & 0xff;
|
||||
resp[1] = (temp >> 8) & 0xff;
|
||||
vnd_cfg_write_resp(cfg_resp_ok, 2, resp);
|
||||
break;
|
||||
case tcmd_get_lower:
|
||||
temp = tempsense_dev_get_lower();
|
||||
resp[0] = temp & 0xff;
|
||||
resp[1] = (temp >> 8) & 0xff;
|
||||
vnd_cfg_write_resp(cfg_resp_ok, 2, resp);
|
||||
break;
|
||||
case tcmd_get_upper:
|
||||
temp = tempsense_dev_get_upper();
|
||||
resp[0] = temp & 0xff;
|
||||
resp[1] = (temp >> 8) & 0xff;
|
||||
vnd_cfg_write_resp(cfg_resp_ok, 2, resp);
|
||||
break;
|
||||
case tcmd_get_crit:
|
||||
temp = tempsense_dev_get_crit();
|
||||
resp[0] = temp & 0xff;
|
||||
resp[1] = (temp >> 8) & 0xff;
|
||||
vnd_cfg_write_resp(cfg_resp_ok, 2, resp);
|
||||
break;
|
||||
default:
|
||||
vnd_cfg_write_resp(cfg_resp_illcmd, 0, NULL);
|
||||
break;
|
||||
|
|
|
@ -259,7 +259,7 @@ void i2ctu_bulk_cmd(void) {
|
|||
handle_read(&cmd);
|
||||
us = cmd.len;
|
||||
if (us > sizeof txbuf) us = sizeof txbuf;
|
||||
vnd_cfg_write_resp(cfg_resp_ok, us, txbuf);
|
||||
vnd_cfg_write_resp(cfg_resp_ok, (uint32_t)us, txbuf);
|
||||
} else if (cmd.len == 0) {
|
||||
handle_probe(&cmd);
|
||||
txbuf[0] = status;
|
||||
|
|
|
@ -52,7 +52,7 @@ void modes_switch(uint8_t newmode);
|
|||
|
||||
extern int mode_current_id;
|
||||
extern int mode_next_id;
|
||||
extern const struct mode* mode_list[16];
|
||||
extern const struct mode* const mode_list[16];
|
||||
#define mode_default (mode_list[1])
|
||||
#define mode_current (((mode_current_id)==-1)?NULL:(mode_list[mode_current_id]))
|
||||
|
||||
|
|
|
@ -1,13 +1,15 @@
|
|||
// vim: set et:
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
#include "mode.h"
|
||||
|
||||
extern struct mode m_01_default/*, m_02_default2*/;
|
||||
|
||||
// clang-format off
|
||||
const struct mode* mode_list[16] = {
|
||||
const struct mode* const mode_list[16] = {
|
||||
NULL, // dummy 0 entry
|
||||
&m_01_default,
|
||||
&m_01_default, // entry 1 CANNOT be NULL!
|
||||
//&m_02_default2,
|
||||
NULL, // terminating entry
|
||||
};
|
||||
|
@ -36,7 +38,7 @@ void modes_init(void) {
|
|||
mode_current_id = &mode_default - mode_list;
|
||||
mode_next_id = -1;
|
||||
|
||||
if (!mode_default) return; // TODO: panic here
|
||||
//if (!mode_default) return;
|
||||
|
||||
// clang-format off
|
||||
#if CFG_TUD_HID > 0
|
||||
|
|
|
@ -56,20 +56,29 @@ void vnd_cfg_write_byte(uint8_t v) {
|
|||
tx_buf[txpos] = v;
|
||||
++txpos;
|
||||
}
|
||||
void vnd_cfg_write_resp(enum cfg_resp stat, uint16_t len, const void* data) {
|
||||
if (len > 0x7fff) len = 0x7fff; // aaaaaaaaaaaaaaaaa // TODO: throw some kind of error
|
||||
|
||||
vnd_cfg_write_byte(stat);
|
||||
if (len < 0x80) {
|
||||
vnd_cfg_write_byte(len);
|
||||
} else {
|
||||
vnd_cfg_write_byte((len & 0x7f) | 0x80);
|
||||
vnd_cfg_write_byte(len >> 7);
|
||||
void vnd_cfg_write_resp(enum cfg_resp stat, uint32_t len, const void* data) {
|
||||
if (len > 0x3fffff) {
|
||||
printf("W: truncating response length from 0x%lx to 0x3fffff\n", len);
|
||||
len = 0x3fffff;
|
||||
}
|
||||
|
||||
vnd_cfg_write_byte(stat);
|
||||
if (len < (1<<7)) {
|
||||
vnd_cfg_write_byte(len);
|
||||
} else if (len < (1<<14)) {
|
||||
vnd_cfg_write_byte((len & 0x7f) | 0x80);
|
||||
vnd_cfg_write_byte((len >> 7) & 0x7f);
|
||||
} else {
|
||||
vnd_cfg_write_byte((len & 0x7f) | 0x80);
|
||||
vnd_cfg_write_byte(((len >> 7) & 0x7f) | 0x80);
|
||||
vnd_cfg_write_byte(((len >> 14) & 0x7f));
|
||||
}
|
||||
|
||||
if (data) {
|
||||
for (size_t i = 0; i < len; ++i) {
|
||||
vnd_cfg_write_byte(((const uint8_t*)data)[i]);
|
||||
}
|
||||
}
|
||||
|
||||
vnd_cfg_write_flush();
|
||||
}
|
||||
|
|
|
@ -43,7 +43,7 @@ enum cfg_resp {
|
|||
uint8_t vnd_cfg_read_byte (void);
|
||||
void vnd_cfg_write_flush(void);
|
||||
void vnd_cfg_write_byte(uint8_t v);
|
||||
void vnd_cfg_write_resp(enum cfg_resp stat, uint16_t len, const void* data);
|
||||
void vnd_cfg_write_resp(enum cfg_resp stat, uint32_t len, const void* data);
|
||||
|
||||
/*
|
||||
* wire protocol:
|
||||
|
|
Loading…
Reference in New Issue