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fix parity calculation bugs

This commit is contained in:
Triss 2021-09-25 13:36:54 +02:00
parent b461946751
commit 75b81bed33
2 changed files with 32 additions and 31 deletions
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49
bsp/rp2040/m_default/dap_jtag.c
View File

@ -12,6 +12,29 @@
#define JTAG_PIO
int jtagsm = -1, jtagoffset = -1;
void PORT_OFF(void) {
if (jtagsm) {
pio_sm_set_enabled(PINOUT_JTAG_PIO_DEV, jtagsm, false);
pio_sm_unclaim(PINOUT_JTAG_PIO_DEV, jtagsm);
}
if (jtagoffset)
pio_remove_program(PINOUT_JTAG_PIO_DEV, &dap_jtag_program, jtagoffset);
jtagoffset = jtagsm = -1;
if (swdsm) {
pio_sm_set_enabled(PINOUT_JTAG_PIO_DEV, swdsm, false);
pio_sm_unclaim(PINOUT_JTAG_PIO_DEV, swdsm);
}
if (swdoffset)
pio_remove_program(PINOUT_JTAG_PIO_DEV, &dap_swd_program, swdoffset);
sio_hw->gpio_oe_clr = PINOUT_SWCLK_MASK | PINOUT_SWDIO_MASK |
PINOUT_TDI_MASK //| PINOUT_TDO_MASK
| PINOUT_nTRST_MASK | PINOUT_nRESET_MASK;
}
#ifndef JTAG_PIO
void PORT_JTAG_SETUP(void) {
resets_hw->reset &= ~(RESETS_RESET_IO_BANK0_BITS | RESETS_RESET_PADS_BANK0_BITS);
@ -54,11 +77,11 @@ void PORT_JTAG_SETUP(void) {
iobank0_hw->io[PINOUT_JTAG_nRESET].ctrl = GPIO_FUNC_SIO << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB;
}
void PORT_OFF(void) {
/*void PORT_OFF(void) {
sio_hw->gpio_oe_clr = PINOUT_SWCLK_MASK | PINOUT_SWDIO_MASK |
PINOUT_TDI_MASK //| PINOUT_TDO_MASK
| PINOUT_nTRST_MASK | PINOUT_nRESET_MASK;
}
}*/
void JTAG_Sequence(uint32_t info, const uint8_t* tdi, uint8_t* tdo) {
uint32_t n = info & JTAG_SEQUENCE_TCK;
@ -101,7 +124,6 @@ void JTAG_Sequence(uint32_t info, const uint8_t* tdi, uint8_t* tdo) {
} else printf("%s", "\nno tdo\n");
}
#else
int jtagsm = -1, jtagoffset = -1;
void PORT_JTAG_SETUP(void) {
resets_hw->reset &= ~(RESETS_RESET_IO_BANK0_BITS | RESETS_RESET_PADS_BANK0_BITS);
@ -150,27 +172,6 @@ void PORT_JTAG_SETUP(void) {
50*1000, PINOUT_JTAG_TCK, PINOUT_JTAG_TDI, PINOUT_JTAG_TDO);
}
void PORT_OFF(void) {
if (jtagsm) {
pio_sm_set_enabled(PINOUT_JTAG_PIO_DEV, jtagsm, false);
pio_sm_unclaim(PINOUT_JTAG_PIO_DEV, jtagsm);
}
if (jtagoffset)
pio_remove_program(PINOUT_JTAG_PIO_DEV, &dap_jtag_program, jtagoffset);
jtagoffset = jtagsm = -1;
if (swdsm) {
pio_sm_set_enabled(PINOUT_JTAG_PIO_DEV, swdsm, false);
pio_sm_unclaim(PINOUT_JTAG_PIO_DEV, swdsm);
}
if (swdoffset)
pio_remove_program(PINOUT_JTAG_PIO_DEV, &dap_swd_program, swdoffset);
sio_hw->gpio_oe_clr = PINOUT_SWCLK_MASK | PINOUT_SWDIO_MASK |
PINOUT_TDI_MASK //| PINOUT_TDO_MASK
| PINOUT_nTRST_MASK | PINOUT_nRESET_MASK;
}
static uint8_t bitswap(uint8_t in) {
static const uint8_t lut[16] = {
0x0, 0x8, 0x4, 0xc, 0x2, 0xa, 0x6, 0xe,

14
bsp/rp2040/m_default/dap_swd.c
View File

@ -10,7 +10,9 @@
#include "dap_swd.pio.h"
#define SWD_PIO
//#define SWD_PIO
int swdsm = -1, swdoffset = -1;
#ifndef SWD_PIO
void PORT_SWD_SETUP(void) {
@ -37,8 +39,7 @@ void PIN_SWDIO_OUT_DISABLE(void) {
inline static void PIN_SWDIO_SET_PIO(void) { PIN_SWDIO_TMS_SET(); }
#else
//#error "no"
int swdsm = -1, swdoffset = -1;
#error "no"
void PORT_SWD_SETUP(void) {
resets_hw->reset &= ~(RESETS_RESET_IO_BANK0_BITS | RESETS_RESET_PADS_BANK0_BITS);
@ -230,10 +231,10 @@ uint8_t SWD_Transfer(uint32_t request, uint32_t* data) {
uint64_t val = 0;
parity = 0;
// FIXME: this is little-endian-only!
swd_seq(32, SWD_SEQUENCE_DIN, NULL, (uint8_t*)&val);
swd_seq(33, SWD_SEQUENCE_DIN, NULL, (uint8_t*)&val);
for (size_t i = 0; i < 32; ++i) parity += ((uint32_t)val >> i) & 1;
if ((parity & 1) != ((val >> 33) & 1)) {
if ((parity & 1) != ((uint32_t)(val >> 32) & 1)) {
ack = DAP_TRANSFER_ERROR;
}
if (data) *data = (uint32_t)val;
@ -251,7 +252,7 @@ uint8_t SWD_Transfer(uint32_t request, uint32_t* data) {
parity = 0;
for (size_t i = 0; i < 32; ++i) parity += (val >> i) & 1;
uint64_t out = val | ((uint64_t)(parity & 1) << 33);
uint64_t out = val | ((uint64_t)(parity & 1) << 32);
// FIXME: this is little-endian-only!
swd_seq(33, 0, (const uint8_t*)&out, NULL);
}
@ -287,7 +288,6 @@ uint8_t SWD_Transfer(uint32_t request, uint32_t* data) {
}
PIN_SWDIO_OUT_ENABLE();
// TODO: set SWDIO hi, no clk!
PIN_SWDIO_SET_PIO();
return ack;
}