silly fixes

This commit is contained in:
Triss 2021-10-07 01:18:47 +02:00
parent 2e85d85de3
commit e81ab81edb
5 changed files with 66 additions and 17 deletions

View File

@ -1,9 +1,11 @@
// vim: set et:
#include <hardware/gpio.h>
#include <hardware/timer.h>
#include <pico/time.h>
#include "util.h"
#include "m_isp/pinout.h"
#include "m_isp/sbw_hw.h"
#include "m_isp/mehfet.h"
@ -29,7 +31,9 @@ void mehfet_hw_init(void) {
void mehfet_hw_deinit(void) {
// shrug
sbw_deinit(); // can't hurt
// TODO: reset pin gpio mux stuff
gpio_set_function(PINOUT_SBW_TCK , GPIO_FUNC_NULL);
gpio_set_function(PINOUT_SBW_TDIO, GPIO_FUNC_NULL);
}
__attribute__((__const__))
@ -45,8 +49,7 @@ const char* /*error string, NULL if no error*/ mehfet_hw_connect(enum mehfet_con
sbw_preinit(conn & mehfet_conn_nrstmask);
if (!sbw_init()) {
// TODO: release target
// TODO: reset pin gpio mux stuff
mehfet_hw_deinit();
return "SBW PIO init failed";
}

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@ -26,8 +26,8 @@
// SBW config
#define PINOUT_SBW_PIO pio1
#define PINOUT_SBW_TCK 14
#define PINOUT_SBW_TDIO 15
#define PINOUT_SBW_TCK 10
#define PINOUT_SBW_TDIO 11
// LED config

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@ -15,8 +15,6 @@
#include "sbw.pio.h"
void sbw_preinit(bool nrst) {
// TODO: nrst
//SLAU320AJ 2.3.1.1 ; SLAS722G p36:
// TEST/SBWTCK low for >100 us: reset debug state
// set nRST/NMI/SBWTDIO low: avoid sending an NMI when the debugger detaches
@ -25,14 +23,7 @@ void sbw_preinit(bool nrst) {
// TEST low for >0.025us <7us: latch on "we want SBW" signal
// TEST high again for >1 us: ready to SBW
//gpio_put(PINOUT_SBW_TCK , false);
gpio_put(PINOUT_SBW_TDIO, true );
gpio_put(PINOUT_SBW_TDIO, false);
gpio_set_dir(PINOUT_SBW_TCK , true);
gpio_set_dir(PINOUT_SBW_TDIO, true);
gpio_set_function(PINOUT_SBW_TCK , GPIO_FUNC_SIO);
gpio_set_function(PINOUT_SBW_TDIO, GPIO_FUNC_SIO);
// old impl, doesn't work, don't use
/*// TCK, TDIO now low
busy_wait_ms(4);//busy_wait_us_32(150); // reset debug state while keeping CPU in reset
@ -45,6 +36,18 @@ void sbw_preinit(bool nrst) {
gpio_put(PINOUT_SBW_TCK , true ); // start SBW stuff
busy_wait_ms(5);//busy_wait_us_32(100); // wait a bit more*/
// TODO: test #if 0 & switch over if it works
#if 1
(void)nrst; // always assumed nrst=false here :/
// from slau320 sources
//gpio_put(PINOUT_SBW_TCK , false);
gpio_put(PINOUT_SBW_TDIO, true ); // FIXME: ummmm TCK ???
gpio_put(PINOUT_SBW_TDIO, false);
gpio_set_dir(PINOUT_SBW_TCK , true);
gpio_set_dir(PINOUT_SBW_TDIO, true);
gpio_set_function(PINOUT_SBW_TCK , GPIO_FUNC_SIO);
gpio_set_function(PINOUT_SBW_TDIO, GPIO_FUNC_SIO);
gpio_put(PINOUT_SBW_TCK , false);
gpio_put(PINOUT_SBW_TDIO, true);
busy_wait_ms(4); // reset TEST logic
@ -69,6 +72,48 @@ void sbw_preinit(bool nrst) {
// "phase 5"
busy_wait_ms(5);
//// new impl:
#else
// from MSP430.DLL 'BIOS' (FETUIF?) sources
// can handle SBW/JTAG selection and nRST stuff
// TEST = TCK
// nRESET = TDIO = NMI
gpio_put(PINOUT_SBW_TCK , true/*false*/); // tck = test
gpio_put(PINOUT_SBW_TDIO, nrst/*true*/);
gpio_set_dir(PINOUT_SBW_TCK , true);
gpio_set_dir(PINOUT_SBW_TDIO, true);
gpio_set_function(PINOUT_SBW_TCK , GPIO_FUNC_SIO);
gpio_set_function(PINOUT_SBW_TDIO, GPIO_FUNC_SIO);
busy_wait_ms(4/*1*/); // 4?
gpio_put(PINOUT_SBW_TDIO, nrst);
busy_wait_us_32(1);
gpio_put(PINOUT_SBW_TCK , true);
// activate test logic
busy_wait_ms(20/*100*/); // 20 should be ok here I think?
// "phase 1"
gpio_put(PINOUT_SBW_TDIO, true); // false here if you want JTAG
busy_wait_us_32(40); // 60?
// "phase 2"
gpio_put(PINOUT_SBW_TCK, false); // ??? // true for JTAG?
// "phase 3"
// something (TDIO hi?) to do if RSTLOW & JTAG?
busy_wait_us_32(1);
// "phase 4"
gpio_put(PINOUT_SBW_TCK , true); // ??? // false for JTAG?
busy_wait_us_32(40/*60*/); // 40 should be ok here I think?
// phase 5
// something (TDIO hi?) to do if RSTHIGH & JTAG?
busy_wait_ms(5);
#endif
}
static int sbw_piosm = -1, sbw_offset = -1;

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@ -249,6 +249,7 @@ void mehfet_task(void) {
if (cmdhdr.len != 0) write_resp_str(mehfet_badargs, "Disconnect takes no parameters");
else {
if (connstat != mehfet_conn_none) mehfet_hw_disconnect();
connstat = mehfet_conn_none;
write_resp(mehfet_ok, 0, NULL);
}

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@ -59,8 +59,8 @@ enum mehfet_conn {
mehfet_conn_jtag_entryseq = 2,
mehfet_conn_sbw_entryseq = 3,
mehfet_conn_typemask = 0x7f,
mehfet_conn_nrstmask = 0x80
mehfet_conn_typemask = 0x7f,
mehfet_conn_nrstmask = 0x80
};
enum mehfet_resettap_flags {