Update 'MehFET USB protocol'

MehFET-USB-protocol.md

@@ -60,30 +60,167 @@ Here the host sends command `8`, with length `0x200`, and data bytes `0xFB 0x01
 
 #### Info
 
+`Info` requests information of the MehFET debugging device.
+
+**Parameters**: None.
+
+**Response data**:
+* 4 bytes: capabilities bitflags (see below), little-endiant
+* 2 bytes: protocol version (little-endian integer), currently 0x0001
+* 1 byte: log2 of the maximum packet size (and the USB buffer size) on the device.
+* 1 byte: reserved
+* null-terminated string: Debugger hardware name. The null terminator must be the final byte of the response.
+
+**Capabilities bitflags**:
+* 0: can debug MSP430 devices using JTAG that do not require a TEST/nRESET entry sequence
+* 1: can debug MSP430 devices using JTAG that do require a TEST/nRESET entry sequence
+* 2: can debug MSP430 devices using SBW that do require a TEST/nRESET entry sequence
+* 8: the `ResetTAP` command is implemented
+* 9: the `IRshift` command is implemented
+* 10: the `DRshift` command is implemented
+
 #### Status
 
+`Status` requests the device status, that is, whether it is currently debugging.
+
+**Parameters**: None.
+
+**Response data**:
+* 1 byte: connection status:
+  * `0`: no connection
+  * `1`: JTAG connection
+  * `2`: Spy-Bi-Wire connection
+
+#### Connect
+
+Connect to a device to be debugged. Performs the TEST/nRESET entry sequence when requested, and reset the TAP to a known state. The host is responsible for checking the JTAG ID, fuse status, and so on.
+
+**Parameters**:
+* 1 byte: method:
+  * `0`: JTAG without TEST/nRESET entry sequence
+  * `1`: JTAG with TEST/nRESET entry sequence
+  * `2`: SBW with TEST/nRESET entry sequence
+  * `0x80`: bitflag: initial value of the nRESET/NMI line
+
 #### Disconnect
 
+Disconnect from the device that is being debugged.
+
+**Parameters**: None.
+
+**Response data**: None.
+
 #### Delay
 
+Perform a delay.
+
+**Parameters**:
+* 4 bytes: delay value (little-endian)
+  * bit 31: bitflag: exact delay. If low, the delay may overshoot the specified duration in order to service USB messages. If high, the device is allowed to busy-wait in order to perform the specified delay.
+  * bit 30: bitflag: units. If low, the delay value is specified in milliseconds. If high, it is specified in microseconds.
+  * bit 29..0: delay value.
+
+**Response data**: None.
+
 #### SetClkSpeed
 
+Set the clock (TCK) speed to either a 'fast' or a 'slow' speed. The 'slow' speed, which is the default, is the speed used to perform a JTAG fuse check. The 'fast' speed is meant to send usable TCLK strobes used during flash programming and erasing.
+
+**Parameters**
+* 1 byte: speed. If zero, switch to the slow speed mode. If nonzero, switch to fast mode.
+
+**Response data**: None.
+
 #### GetOldLines
 
+Responds the values the TCK, TMS and TDI lines were last set at.
+
+**Parameters**: None.
+
+**Response data**:
+* 1 byte: bitflag:
+  * bit 0: TCLK level
+  * bit 1: TMS level
+  * bit 2: TDI level
+
 #### TdioSequence
 
+Perform a JTAG or SBW data sequence. Shift data through TDI and TDO while holding TMS constant.
+
+**Parameters**:
+* 4 bytes: number of bits to shift (which is the same as the number of cycles) (little-endian)
+* 1 byte: TMS line level to be held during the entire sequence, zero for low, nonzero for high.
+* length-5 bytes: TDI data bits to shift into the debugged device. Data is shifted in from the low bit to the high bit. The number of TDI data bytes must also be equal to `(num_bits + 7) >> 3`.
+
+**Response data**:
+* TDO data shifted out from the debugged device. Same format and number of bytes as for the TDI bytes.
+
 #### TmsSequence
 
+Perform a JTAG or SBW sequence changing the TAP state.
+
+*WARNING*: The host software must use `GetOldLines` when going through the Run-Test/IDLE JTAG state to specify the TDI level, to avoid spurious TCLK edges.
+
+**Parameters**:
+* 4 bytes: number of bits to shift (little-endian)
+* 1 byte: TDI line level to be held during the entire sequence, zero for low, nonzero for high.
+* length-5 bytes: TMS data bits to shift into the debugged device. Data is shifted in from the low bit to the high bit. The number of TMS data bytes must also be equal to `(num_bits + 7) >> 3`.
+
+**Response data**: None.
+
 #### TclkEdge
 
+Perform a single TCLK edge, setting the clock low or high.
+
+**Parameters**:
+* 1 byte: new TCLK value: zero for low, nonzero for high. The debugger device keeps track of the old TCLK value.
+
+**Response data**: None.
+
 #### TclkStrobe
 
+Perform a TCLK burst/strobe, that is, perform a number of full TCLK cycles.
+
+**Parameters**:
+* 4 bytes: clock cycle count (little-endian). This is half the number of TCLK edges.
+
+**Response data**: None.
+
 #### ResetTAP
 
+Reset the TAP state to the Run-Test/IDLE state, and optionally perform a JTAG fuse check.
+
+**Parameters**:
+* 1 byte: bitflags:
+  * bit 0: reset TAP to Run-Test/IDLE
+  * bit 1: perform JTAG fuse check on device to be debugged (that is, perform the TMS sequence used to make the device check its internal fuse).
+  * bit 2: read back the results of the JTAG fuse check (that is, return the result of the operation performed by setting bit 1).
+
+**Response data**:
+* 1 byte: bitflags:
+  * bit 7: high: JTAG fuse is blown. (Only valid if bit 2 set in parameters.)
+
 #### IRshift
 
+Shift bits into and out of the IR. The IR is always presumed to be 8 bit wide.
+
+**Parameters**:
+* 1 byte: new IR data to be shifted into the debugged device.
+
+**Response data**:
+* 1 byte: old IR data shifted out of the debugged device.
+
 #### DRshift
 
+Shift bits into and out of the DR. The DR can have a varying bit width.
+
+**Parameters**:
+* 1 byte: number of bits
+* length-1 bytes: new DR value. Bits are shifted in from lowest to highest, byte by byte.
+
+**Response data**:
+* Old DR value shifted out of the device. Same format and number of bytes as the new DR in the parameters.
+
 ### Statuses
 
 ```