lmi: Inhibit SRST on Tiva and add some fault checks.
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8e2c2757b4
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00183f1a9b
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@ -84,6 +84,7 @@ bool lmi_probe(target *t)
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t->driver = lmi_driver_str;
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t->driver = lmi_driver_str;
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target_add_ram(t, 0x20000000, 0x10000);
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target_add_ram(t, 0x20000000, 0x10000);
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lmi_add_flash(t, 0x80000);
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lmi_add_flash(t, 0x80000);
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t->target_options |= CORTEXM_TOPT_INHIBIT_SRST;
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return true;
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return true;
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}
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}
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return false;
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return false;
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@ -92,6 +93,9 @@ bool lmi_probe(target *t)
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int lmi_flash_erase(struct target_flash *f, target_addr addr, size_t len)
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int lmi_flash_erase(struct target_flash *f, target_addr addr, size_t len)
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{
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{
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target *t = f->t;
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target *t = f->t;
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target_check_error(t);
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while(len) {
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while(len) {
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target_mem_write32(t, LMI_FLASH_FMA, addr);
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target_mem_write32(t, LMI_FLASH_FMA, addr);
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target_mem_write32(t, LMI_FLASH_FMC,
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target_mem_write32(t, LMI_FLASH_FMC,
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@ -99,6 +103,9 @@ int lmi_flash_erase(struct target_flash *f, target_addr addr, size_t len)
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while (target_mem_read32(t, LMI_FLASH_FMC) &
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while (target_mem_read32(t, LMI_FLASH_FMC) &
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LMI_FLASH_FMC_ERASE);
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LMI_FLASH_FMC_ERASE);
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if (target_check_error(t))
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return -1;
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len -= BLOCK_SIZE;
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len -= BLOCK_SIZE;
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addr += BLOCK_SIZE;
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addr += BLOCK_SIZE;
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}
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}
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@ -110,9 +117,14 @@ int lmi_flash_write(struct target_flash *f,
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{
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{
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target *t = f->t;
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target *t = f->t;
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target_check_error(t);
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target_mem_write(t, SRAM_BASE, lmi_flash_write_stub,
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target_mem_write(t, SRAM_BASE, lmi_flash_write_stub,
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sizeof(lmi_flash_write_stub));
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sizeof(lmi_flash_write_stub));
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target_mem_write(t, STUB_BUFFER_BASE, src, len);
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target_mem_write(t, STUB_BUFFER_BASE, src, len);
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if (target_check_error(t))
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return -1;
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return cortexm_run_stub(t, SRAM_BASE, dest, STUB_BUFFER_BASE, len, 0);
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return cortexm_run_stub(t, SRAM_BASE, dest, STUB_BUFFER_BASE, len, 0);
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}
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}
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