stm32f4: Fixes erase_mass command return error.
The final erase_mass command check is looking for the EOP (End of OPeration) bit to be set. This bit is only set when the EOP interrupts (EOPIE = 1) are enabled. We are not enabling those on the target so this bit will never get set. As we are monitoring the BSY flag to make sure the erase_mass operation is still ongoing and finished it is enough if we just check the error flags.
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@ -51,7 +51,7 @@ static int stm32f4_flash_erase(struct target_flash *f, target_addr addr, size_t
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static int stm32f4_flash_write(struct target_flash *f, target_addr dest, const void *src, size_t len);
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static int stm32f4_flash_write(struct target_flash *f, target_addr dest, const void *src, size_t len);
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static bool stm32f4_mass_erase(target *t);
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static bool stm32f4_mass_erase(target *t);
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/* Flash Program ad Erase Controller Register Map */
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/* Flash Program and Erase Controller Register Map */
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#define FPEC_BASE 0x40023C00
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#define FPEC_BASE 0x40023C00
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#define FLASH_ACR (FPEC_BASE+0x00)
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#define FLASH_ACR (FPEC_BASE+0x00)
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#define FLASH_KEYR (FPEC_BASE+0x04)
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#define FLASH_KEYR (FPEC_BASE+0x04)
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@ -492,7 +492,7 @@ static bool stm32f4_mass_erase(target *t)
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/* Check for error */
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/* Check for error */
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const uint32_t result = target_mem_read32(t, FLASH_SR);
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const uint32_t result = target_mem_read32(t, FLASH_SR);
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return !(result & SR_ERROR_MASK) && (result & SR_EOP);
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return !(result & SR_ERROR_MASK);
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}
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}
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/* Dev | DOC |Rev|ID |OPTCR |OPTCR |OPTCR1 |OPTCR1 | OPTCR2
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/* Dev | DOC |Rev|ID |OPTCR |OPTCR |OPTCR1 |OPTCR1 | OPTCR2
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