cortexm: Poll for S_RESET_ST in DHCSR to detect release from reset.
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@ -515,6 +515,9 @@ cortexm_reset(struct target_s *target)
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jtagtap_srst();
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/* Read DHCSR here to clear S_RESET_ST bit before reset */
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adiv5_ap_mem_read(ap, CORTEXM_DHCSR);
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/* Request system reset from NVIC: SRST doesn't work correctly */
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/* This could be VECTRESET: 0x05FA0001 (reset only core)
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* or SYSRESETREQ: 0x05FA0004 (system reset)
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@ -523,10 +526,7 @@ cortexm_reset(struct target_s *target)
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CORTEXM_AIRCR_VECTKEY | CORTEXM_AIRCR_SYSRESETREQ);
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/* Poll for release from reset */
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while(adiv5_ap_mem_read(ap, CORTEXM_AIRCR) &
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(CORTEXM_AIRCR_VECTRESET | CORTEXM_AIRCR_SYSRESETREQ));
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platform_delay(2);
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while(adiv5_ap_mem_read(ap, CORTEXM_DHCSR) & CORTEXM_DHCSR_S_RESET_ST);
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/* Reset DFSR flags */
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adiv5_ap_mem_write(ap, CORTEXM_DFSR, CORTEXM_DFSR_RESETALL);
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