stm32f1: Switched to the unified mass erase command and added progress dots to stop GDB timing out
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c2d72b4825
commit
17c04d585e
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@ -38,18 +38,18 @@
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#include "target.h"
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#include "target_internal.h"
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#include "cortexm.h"
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#include "gdb_packet.h"
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static bool stm32f1_cmd_erase_mass(target *t, int argc, const char **argv);
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static bool stm32f1_cmd_option(target *t, int argc, const char **argv);
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const struct command_s stm32f1_cmd_list[] = {
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{"erase_mass", (cmd_handler)stm32f1_cmd_erase_mass, "Erase entire flash memory"},
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{"option", (cmd_handler)stm32f1_cmd_option, "Manipulate option bytes"},
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{NULL, NULL, NULL},
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{NULL, NULL, NULL}
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};
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static int stm32f1_flash_erase(struct target_flash *f, target_addr addr, size_t len);
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static int stm32f1_flash_write(struct target_flash *f, target_addr dest, const void *src, size_t len);
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static bool stm32f1_mass_erase(target *t);
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/* Flash Program ad Erase Controller Register Map */
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#define FPEC_BASE 0x40022000
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@ -146,6 +146,7 @@ bool gd32f1_probe(target *t)
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return false;
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}
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t->mass_erase = stm32f1_mass_erase;
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target_add_ram(t, 0x20000000, ramSize * 1024);
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stm32f1_add_flash(t, 0x8000000, flashSize * 1024, 0x400);
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target_add_commands(t, stm32f1_cmd_list, t->driver);
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@ -165,6 +166,7 @@ bool stm32f1_probe(target *t)
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else
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t->idcode = target_mem_read32(t, DBGMCU_IDCODE) & 0xfff;
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t->mass_erase = stm32f1_mass_erase;
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size_t flash_size;
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size_t block_size = 0x400;
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@ -313,16 +315,16 @@ static int stm32f1_flash_erase(struct target_flash *f, target_addr addr, size_t
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/* Check for error */
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if (start < FLASH_BANK_SPLIT) {
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uint32_t sr = target_mem_read32(t, FLASH_SR);
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if ((sr & SR_ERROR_MASK) || !(sr & SR_EOP)) {
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DEBUG_INFO("stm32f1 flash erase error 0x%" PRIx32 "\n", sr);
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const uint32_t status = target_mem_read32(t, FLASH_SR);
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if ((status & SR_ERROR_MASK) || !(status & SR_EOP)) {
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DEBUG_INFO("stm32f1 flash erase error 0x%" PRIx32 "\n", status);
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return -1;
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}
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}
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if (t->idcode == 0x430 && end >= FLASH_BANK_SPLIT) {
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uint32_t sr = target_mem_read32(t, FLASH_SR + FLASH_BANK2_OFFSET);
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if ((sr & SR_ERROR_MASK) || !(sr & SR_EOP)) {
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DEBUG_INFO("stm32f1 bank 2 flash erase error 0x%" PRIx32 "\n", sr);
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const uint32_t status = target_mem_read32(t, FLASH_SR + FLASH_BANK2_OFFSET);
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if ((status & SR_ERROR_MASK) || !(status & SR_EOP)) {
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DEBUG_INFO("stm32f1 bank 2 flash erase error 0x%" PRIx32 "\n", status);
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return -1;
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}
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}
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@ -386,23 +388,29 @@ static int stm32f1_flash_write(struct target_flash *f, target_addr dest, const v
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return 0;
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}
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static bool stm32f1_cmd_erase_mass(target *t, int argc, const char **argv)
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static bool stm32f1_mass_erase(target *t)
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{
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(void)argc;
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(void)argv;
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if (stm32f1_flash_unlock(t, 0))
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return false;
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platform_timeout timeout;
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platform_timeout_set(&timeout, 500);
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/* Flash mass erase start instruction */
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target_mem_write32(t, FLASH_CR, FLASH_CR_MER);
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target_mem_write32(t, FLASH_CR, FLASH_CR_STRT | FLASH_CR_MER);
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/* Read FLASH_SR to poll for BSY bit */
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while (target_mem_read32(t, FLASH_SR) & FLASH_SR_BSY)
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while (target_mem_read32(t, FLASH_SR) & FLASH_SR_BSY) {
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if (target_check_error(t))
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return false;
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if (platform_timeout_is_expired(&timeout)) {
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gdb_out(".");
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platform_timeout_set(&timeout, 500);
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}
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}
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/* Check for error */
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uint16_t sr = target_mem_read32(t, FLASH_SR);
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if ((sr & SR_ERROR_MASK) || !(sr & SR_EOP))
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