adiv5: Progressive incrementing TRNCNT for the DHCSR write when trying to halt
Workaround for CMSIS-DAP/Bulk debugger orbtrace that returns NO_ACK with high values of TRNCNT. Perhaps only STM32F767 needs write to DHCSR with high occupancy to catch the device in a moment not sleeping.
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@ -329,13 +329,26 @@ static uint32_t cortexm_initial_halt(ADIv5_AP_t *ap)
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adiv5_ap_write(ap, ADIV5_AP_CSW, ap->csw | ADIV5_AP_CSW_SIZE_WORD);
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adiv5_dp_low_access(ap->dp, ADIV5_LOW_WRITE, ADIV5_AP_TAR, CORTEXM_DHCSR);
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}
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/* Workaround for CMSIS-DAP Bulk orbtrace
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* High values of TRNCNT lead to NO_ACK answer from debugger.
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*
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* However CMSIS/HID even with highest value has few chances to catch
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* a STM32F767 mostly sleeping in WFI!
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*/
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uint32_t start_time = platform_time_ms();
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int trncnt = 0x80;
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while (!platform_timeout_is_expired(&to)) {
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uint32_t dhcsr ;
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if (use_low_access) {
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adiv5_dp_low_access(ap->dp, ADIV5_LOW_WRITE, ADIV5_DP_CTRLSTAT,
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ctrlstat | (0xfff * ADIV5_DP_CTRLSTAT_TRNCNT));
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ctrlstat | (trncnt * ADIV5_DP_CTRLSTAT_TRNCNT));
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adiv5_dp_low_access(ap->dp, ADIV5_LOW_WRITE, ADIV5_AP_DRW,
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dhcsr_ctl);
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if (trncnt < 0xfff) {
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trncnt += (platform_time_ms() - start_time) * 8;
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} else {
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trncnt = 0xfff;
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}
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dhcsr = adiv5_dp_low_access(
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ap->dp, ADIV5_LOW_READ, ADIV5_AP_DRW, 0);
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} else {
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