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adiv5: Progressive incrementing TRNCNT for the DHCSR write when trying to halt 

Workaround for CMSIS-DAP/Bulk debugger orbtrace  that returns NO_ACK
with high values of TRNCNT. Perhaps only STM32F767 needs write to DHCSR
with high occupancy to catch the device in a moment not sleeping.
This commit is contained in:
Uwe Bonnes 2021-10-27 01:11:09 +02:00
parent 07b4e5726e
commit 181466549b
1 changed files with 14 additions and 1 deletions
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15
src/target/adiv5.c
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@ -329,13 +329,26 @@ static uint32_t cortexm_initial_halt(ADIv5_AP_t *ap)
adiv5_ap_write(ap, ADIV5_AP_CSW, ap->csw | ADIV5_AP_CSW_SIZE_WORD); adiv5_ap_write(ap, ADIV5_AP_CSW, ap->csw | ADIV5_AP_CSW_SIZE_WORD);
adiv5_dp_low_access(ap->dp, ADIV5_LOW_WRITE, ADIV5_AP_TAR, CORTEXM_DHCSR); adiv5_dp_low_access(ap->dp, ADIV5_LOW_WRITE, ADIV5_AP_TAR, CORTEXM_DHCSR);
} }
/* Workaround for CMSIS-DAP Bulk orbtrace
* High values of TRNCNT lead to NO_ACK answer from debugger.
*
* However CMSIS/HID even with highest value has few chances to catch
* a STM32F767 mostly sleeping in WFI!
*/
uint32_t start_time = platform_time_ms();
int trncnt = 0x80;
while (!platform_timeout_is_expired(&to)) { while (!platform_timeout_is_expired(&to)) {
uint32_t dhcsr ; uint32_t dhcsr ;
if (use_low_access) { if (use_low_access) {
adiv5_dp_low_access(ap->dp, ADIV5_LOW_WRITE, ADIV5_DP_CTRLSTAT, adiv5_dp_low_access(ap->dp, ADIV5_LOW_WRITE, ADIV5_DP_CTRLSTAT,
ctrlstat | (0xfff * ADIV5_DP_CTRLSTAT_TRNCNT)); ctrlstat | (trncnt * ADIV5_DP_CTRLSTAT_TRNCNT));
adiv5_dp_low_access(ap->dp, ADIV5_LOW_WRITE, ADIV5_AP_DRW, adiv5_dp_low_access(ap->dp, ADIV5_LOW_WRITE, ADIV5_AP_DRW,
dhcsr_ctl); dhcsr_ctl);
if (trncnt < 0xfff) {
trncnt += (platform_time_ms() - start_time) * 8;
} else {
trncnt = 0xfff;
}
dhcsr = adiv5_dp_low_access( dhcsr = adiv5_dp_low_access(
ap->dp, ADIV5_LOW_READ, ADIV5_AP_DRW, 0); ap->dp, ADIV5_LOW_READ, ADIV5_AP_DRW, 0);
} else { } else {