adiv5.c: Run cortexm_prepare on all suspected CortexM instances.
Gets all debug units of the second CPU of a STM32H745 visible.
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@ -411,7 +411,7 @@ static bool adiv5_component_probe(ADIv5_AP_t *ap, uint32_t addr, int recursion,
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uint32_t cidr = adiv5_ap_read_id(ap, addr + CIDR0_OFFSET);
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uint32_t cidr = adiv5_ap_read_id(ap, addr + CIDR0_OFFSET);
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if ((cidr & ~CID_CLASS_MASK) != CID_PREAMBLE) {
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if ((cidr & ~CID_CLASS_MASK) != CID_PREAMBLE) {
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/* Maybe caused by a not halted CortexM */
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/* Maybe caused by a not halted CortexM */
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if (!ap->apsel && ((ap->idr & 0xf) == ARM_AP_TYPE_AHB)) {
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if ((ap->idr & 0xf) == ARM_AP_TYPE_AHB) {
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if (!cortexm_prepare(ap))
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if (!cortexm_prepare(ap))
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return false; /* Halting failed! */
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return false; /* Halting failed! */
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/* CPU now halted, read cidr again. */
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/* CPU now halted, read cidr again. */
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