adiv5: Split PRIx64 into two PRIx32 as nanolib does not support PRIx64.
This commit is contained in:
parent
75186f7d50
commit
2065c70888
|
@ -310,8 +310,9 @@ static bool adiv5_component_probe(ADIv5_AP_t *ap, uint32_t addr, int recursion,
|
||||||
DEBUG("Fault reading ROM table entry\n");
|
DEBUG("Fault reading ROM table entry\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
DEBUG("ROM: Table BASE=0x%"PRIx32" SYSMEM=0x%"PRIx32", PIDR 0x%010"
|
DEBUG("ROM: Table BASE=0x%" PRIx32 " SYSMEM=0x%" PRIx32 ", PIDR 0x%02"
|
||||||
PRIx64 "\n", addr, memtype, pidr);
|
PRIx32 "%08" PRIx32 "\n", addr, memtype, (uint32_t)(pidr >> 32),
|
||||||
|
(uint32_t)pidr);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
for (int i = 0; i < 960; i++) {
|
for (int i = 0; i < 960; i++) {
|
||||||
|
@ -324,7 +325,8 @@ static bool adiv5_component_probe(ADIv5_AP_t *ap, uint32_t addr, int recursion,
|
||||||
break;
|
break;
|
||||||
|
|
||||||
if (!(entry & ADIV5_ROM_ROMENTRY_PRESENT)) {
|
if (!(entry & ADIV5_ROM_ROMENTRY_PRESENT)) {
|
||||||
DEBUG("%s%d Entry 0x%"PRIx32" -> Not present\n", indent, i, entry);
|
DEBUG("%s%d Entry 0x%" PRIx32 " -> Not present\n", indent,
|
||||||
|
i, entry);
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -339,8 +341,9 @@ static bool adiv5_component_probe(ADIv5_AP_t *ap, uint32_t addr, int recursion,
|
||||||
* any components by other designers.
|
* any components by other designers.
|
||||||
*/
|
*/
|
||||||
if ((pidr & ~(PIDR_REV_MASK | PIDR_PN_MASK)) != PIDR_ARM_BITS) {
|
if ((pidr & ~(PIDR_REV_MASK | PIDR_PN_MASK)) != PIDR_ARM_BITS) {
|
||||||
DEBUG("%s0x%"PRIx32": 0x%"PRIx64" <- does not match ARM JEP-106\n",
|
DEBUG("%s0x%" PRIx32 ": 0x%02" PRIx32 "%08" PRIx32
|
||||||
indent, addr, pidr);
|
" <- does not match ARM JEP-106\n",
|
||||||
|
indent, addr, (uint32_t)(pidr >> 32), (uint32_t)pidr);
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -352,11 +355,14 @@ static bool adiv5_component_probe(ADIv5_AP_t *ap, uint32_t addr, int recursion,
|
||||||
int i;
|
int i;
|
||||||
for (i = 0; pidr_pn_bits[i].arch != aa_end; i++) {
|
for (i = 0; pidr_pn_bits[i].arch != aa_end; i++) {
|
||||||
if (pidr_pn_bits[i].part_number == part_number) {
|
if (pidr_pn_bits[i].part_number == part_number) {
|
||||||
DEBUG("%s%d 0x%"PRIx32": %s - %s %s (PIDR = 0x%"PRIx64")",
|
DEBUG("%s%d 0x%" PRIx32 ": %s - %s %s (PIDR = 0x%02" PRIx32
|
||||||
indent + 1, num_entry, addr, cidc_debug_strings[cid_class],
|
"%08" PRIx32 ")",
|
||||||
pidr_pn_bits[i].type, pidr_pn_bits[i].full, pidr);
|
indent + 1, num_entry, addr,
|
||||||
/* Perform sanity check, if we know what to expect as component ID
|
cidc_debug_strings[cid_class],
|
||||||
* class.
|
pidr_pn_bits[i].type, pidr_pn_bits[i].full,
|
||||||
|
(uint32_t)(pidr >> 32), (uint32_t)pidr);
|
||||||
|
/* Perform sanity check, if we know what to expect as
|
||||||
|
* component ID class.
|
||||||
*/
|
*/
|
||||||
if ((pidr_pn_bits[i].cidc != cidc_unknown) &&
|
if ((pidr_pn_bits[i].cidc != cidc_unknown) &&
|
||||||
(cid_class != pidr_pn_bits[i].cidc)) {
|
(cid_class != pidr_pn_bits[i].cidc)) {
|
||||||
|
@ -382,8 +388,10 @@ static bool adiv5_component_probe(ADIv5_AP_t *ap, uint32_t addr, int recursion,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
if (pidr_pn_bits[i].arch == aa_end) {
|
if (pidr_pn_bits[i].arch == aa_end) {
|
||||||
DEBUG("%s0x%"PRIx32": %s - Unknown (PIDR = 0x%"PRIx64")\n",
|
DEBUG("%s0x%" PRIx32 ": %s - Unknown (PIDR = 0x%02" PRIx32
|
||||||
indent, addr, cidc_debug_strings[cid_class], pidr);
|
"%08" PRIx32 ")\n",
|
||||||
|
indent, addr, cidc_debug_strings[cid_class],
|
||||||
|
(uint32_t)(pidr >> 32), (uint32_t)pidr);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
return res;
|
return res;
|
||||||
|
|
Loading…
Reference in New Issue