Fixed SAM D20 support with reset attached.
monitor connect_srst enable can be used to connect to targets that re-use the SWCLK pin
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parent
e75798f201
commit
2a444ab1fb
33
src/samd20.c
33
src/samd20.c
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@ -235,8 +235,21 @@ samd20_reset(struct target_s *target)
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{
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ADIv5_AP_t *ap = adiv5_target_ap(target);
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jtagtap_srst(true);
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jtagtap_srst(false);
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/**
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* SRST is not asserted here as it appears to reset the adiv5
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* logic, meaning that subsequent adiv5_* calls PLATFORM_FATAL_ERROR.
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*
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* This is ok as normally you can just connect the debugger and go,
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* but if that's not possible (protection or SWCLK being used for
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* something else) then having SWCLK low on reset should get you
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* debug access (cold-plugging). TODO: Confirm this
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*
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* See the SAM D20 datasheet §12.6 Debug Operation for more
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* details.
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*
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* jtagtap_srst(true);
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* jtagtap_srst(false);
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*/
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/* Read DHCSR here to clear S_RESET_ST bit before reset */
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adiv5_ap_mem_read(ap, CORTEXM_DHCSR);
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@ -309,13 +322,17 @@ bool samd20_probe(struct target_s *target)
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target->flash_write = samd20_flash_write;
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target_add_commands(target, samd20_cmd_list, "SAMD20");
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/* Release the target from extended reset to make attach possible */
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if (adiv5_ap_mem_read(ap, SAMD20_DSU_CTRLSTAT) &
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SAMD20_STATUSA_CRSTEXT) {
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/* If we're not in reset here */
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if (!connect_assert_srst) {
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/* We'll have to release the target from
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* extended reset to make attach possible */
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if (adiv5_ap_mem_read(ap, SAMD20_DSU_CTRLSTAT) &
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SAMD20_STATUSA_CRSTEXT) {
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/* Write bit to clear from extended reset */
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adiv5_ap_mem_write(ap, SAMD20_DSU_CTRLSTAT,
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SAMD20_STATUSA_CRSTEXT);
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/* Write bit to clear from extended reset */
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adiv5_ap_mem_write(ap, SAMD20_DSU_CTRLSTAT,
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SAMD20_STATUSA_CRSTEXT);
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}
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}
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return true;
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