Fixed some issues with trace port capture.
Process last capture even on timeout. Prevents last bit getting lost. On timeout, don't allow next edge to resync decoder. Timeout on 6 bit periods instead of 5. Set systick interrupt to low priority.
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86626085d8
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38bea69f8a
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@ -78,6 +78,8 @@ int platform_init(void)
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/* Setup heartbeat timer */
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/* Setup heartbeat timer */
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systick_set_clocksource(STK_CTRL_CLKSOURCE_AHB_DIV8);
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systick_set_clocksource(STK_CTRL_CLKSOURCE_AHB_DIV8);
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systick_set_reload(900000); /* Interrupt us at 10 Hz */
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systick_set_reload(900000); /* Interrupt us at 10 Hz */
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SCB_SHPR(11) &= ~((15 << 4) & 0xff);
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SCB_SHPR(11) |= ((14 << 4) & 0xff);
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systick_interrupt_enable();
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systick_interrupt_enable();
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systick_counter_enable();
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systick_counter_enable();
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@ -109,35 +109,36 @@ void trace_buf_drain(uint8_t ep)
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void tim3_isr(void)
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void tim3_isr(void)
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{
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{
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uint16_t sr = TIM_SR(TIM3) & TIM_DIER(TIM3);
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uint16_t sr = TIM_SR(TIM3);
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uint16_t duty, cycle;
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uint16_t duty, cycle;
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static uint16_t bt;
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static uint16_t bt;
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static uint8_t lastbit;
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static uint8_t lastbit;
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static uint8_t decbuf[17];
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static uint8_t decbuf[17];
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static uint8_t decbuf_pos;
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static uint8_t decbuf_pos;
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static uint8_t halfbit;
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static uint8_t halfbit;
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static uint8_t notstart;
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/* Reset decoder state if capture overflowed */
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/* Reset decoder state if capture overflowed */
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if (sr & (TIM_SR_CC1OF | TIM_SR_UIF)) {
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if (sr & (TIM_SR_CC1OF | TIM_SR_UIF)) {
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timer_clear_flag(TIM3, TIM_SR_CC1OF | TIM_SR_UIF);
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timer_clear_flag(TIM3, TIM_SR_CC1OF | TIM_SR_UIF);
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if (!(sr & TIM_SR_CC1IF)) {
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if (!(sr & (TIM_SR_CC2IF | TIM_SR_CC1IF)))
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timer_set_period(TIM3, -1);
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timer_disable_irq(TIM3, TIM_DIER_UIE);
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goto flush_and_reset;
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goto flush_and_reset;
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}
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}
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}
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if (!(sr & TIM_SR_CC1IF))
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return;
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cycle = TIM_CCR1(TIM3);
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cycle = TIM_CCR1(TIM3);
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duty = TIM_CCR2(TIM3);
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duty = TIM_CCR2(TIM3);
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/* Reset decoder state if crazy shit happened */
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/* Reset decoder state if crazy shit happened */
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if ((bt && ((duty / bt) > 2)) || (duty == 0))
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if ((bt && (((duty / bt) > 2) || ((duty / bt) == 0))) || (duty == 0))
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goto flush_and_reset;
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goto flush_and_reset;
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if(!(sr & TIM_SR_CC1IF)) notstart = 1;
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if (!bt) {
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if (!bt) {
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if (notstart) {
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notstart = 0;
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return;
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}
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/* First bit, sync decoder */
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/* First bit, sync decoder */
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duty -= ALLOWED_DUTY_ERROR;
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duty -= ALLOWED_DUTY_ERROR;
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if (((cycle / duty) != 2) &&
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if (((cycle / duty) != 2) &&
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@ -146,7 +147,7 @@ void tim3_isr(void)
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bt = duty;
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bt = duty;
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lastbit = 1;
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lastbit = 1;
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halfbit = 0;
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halfbit = 0;
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timer_set_period(TIM3, duty * 5);
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timer_set_period(TIM3, duty * 6);
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timer_clear_flag(TIM3, TIM_SR_UIF);
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timer_clear_flag(TIM3, TIM_SR_UIF);
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timer_enable_irq(TIM3, TIM_DIER_UIE);
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timer_enable_irq(TIM3, TIM_DIER_UIE);
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} else {
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} else {
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@ -161,7 +162,7 @@ void tim3_isr(void)
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decbuf_pos++;
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decbuf_pos++;
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}
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}
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if (((cycle - duty) / bt) > 2)
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if (!(sr & TIM_SR_CC1IF) || (((cycle - duty) / bt) > 2))
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goto flush_and_reset;
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goto flush_and_reset;
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if (((cycle - duty) / bt) > 1) {
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if (((cycle - duty) / bt) > 1) {
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@ -178,6 +179,8 @@ void tim3_isr(void)
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return;
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return;
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flush_and_reset:
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flush_and_reset:
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timer_set_period(TIM3, -1);
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timer_disable_irq(TIM3, TIM_DIER_UIE);
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trace_buf_push(decbuf, decbuf_pos >> 3);
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trace_buf_push(decbuf, decbuf_pos >> 3);
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bt = 0;
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bt = 0;
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decbuf_pos = 0;
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decbuf_pos = 0;
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