samd: Made all the defined constants unsigned
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dragonmux
Piotr Esden-Tempski
parent
da2c4f24b0
commit
3dadd64f9b
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@ -65,84 +65,84 @@ const struct command_s samd_cmd_list[] = {
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};
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/* Non-Volatile Memory Controller (NVMC) Parameters */
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#define SAMD_ROW_SIZE 256
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#define SAMD_PAGE_SIZE 64
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#define SAMD_ROW_SIZE 256U
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#define SAMD_PAGE_SIZE 64U
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/* -------------------------------------------------------------------------- */
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/* Non-Volatile Memory Controller (NVMC) Registers */
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/* -------------------------------------------------------------------------- */
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#define SAMD_NVMC 0x41004000
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#define SAMD_NVMC_CTRLA (SAMD_NVMC + 0x0)
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#define SAMD_NVMC_CTRLB (SAMD_NVMC + 0x04)
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#define SAMD_NVMC_PARAM (SAMD_NVMC + 0x08)
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#define SAMD_NVMC_INTFLAG (SAMD_NVMC + 0x14)
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#define SAMD_NVMC_STATUS (SAMD_NVMC + 0x18)
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#define SAMD_NVMC_ADDRESS (SAMD_NVMC + 0x1C)
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#define SAMD_NVMC 0x41004000U
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#define SAMD_NVMC_CTRLA (SAMD_NVMC + 0x00U)
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#define SAMD_NVMC_CTRLB (SAMD_NVMC + 0x04U)
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#define SAMD_NVMC_PARAM (SAMD_NVMC + 0x08U)
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#define SAMD_NVMC_INTFLAG (SAMD_NVMC + 0x14U)
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#define SAMD_NVMC_STATUS (SAMD_NVMC + 0x18U)
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#define SAMD_NVMC_ADDRESS (SAMD_NVMC + 0x1CU)
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/* Control A Register (CTRLA) */
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#define SAMD_CTRLA_CMD_KEY 0xA500
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#define SAMD_CTRLA_CMD_ERASEROW 0x0002
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#define SAMD_CTRLA_CMD_WRITEPAGE 0x0004
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#define SAMD_CTRLA_CMD_ERASEAUXROW 0x0005
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#define SAMD_CTRLA_CMD_WRITEAUXPAGE 0x0006
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#define SAMD_CTRLA_CMD_LOCK 0x0040
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#define SAMD_CTRLA_CMD_UNLOCK 0x0041
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#define SAMD_CTRLA_CMD_PAGEBUFFERCLEAR 0x0044
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#define SAMD_CTRLA_CMD_SSB 0x0045
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#define SAMD_CTRLA_CMD_INVALL 0x0046
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#define SAMD_CTRLA_CMD_KEY 0xA500U
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#define SAMD_CTRLA_CMD_ERASEROW 0x0002U
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#define SAMD_CTRLA_CMD_WRITEPAGE 0x0004U
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#define SAMD_CTRLA_CMD_ERASEAUXROW 0x0005U
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#define SAMD_CTRLA_CMD_WRITEAUXPAGE 0x0006U
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#define SAMD_CTRLA_CMD_LOCK 0x0040U
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#define SAMD_CTRLA_CMD_UNLOCK 0x0041U
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#define SAMD_CTRLA_CMD_PAGEBUFFERCLEAR 0x0044U
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#define SAMD_CTRLA_CMD_SSB 0x0045U
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#define SAMD_CTRLA_CMD_INVALL 0x0046U
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/* Interrupt Flag Register (INTFLAG) */
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#define SAMD_NVMC_READY (1 << 0)
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#define SAMD_NVMC_READY (1U << 0U)
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/* Non-Volatile Memory Calibration and Auxiliary Registers */
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#define SAMD_NVM_USER_ROW_LOW 0x00804000
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#define SAMD_NVM_USER_ROW_HIGH 0x00804004
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#define SAMD_NVM_CALIBRATION 0x00806020
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#define SAMD_NVM_SERIAL(n) (0x0080A00C + (0x30 * (((n) + 3) / 4)) + ((n)*4))
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#define SAMD_NVM_USER_ROW_LOW 0x00804000U
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#define SAMD_NVM_USER_ROW_HIGH 0x00804004U
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#define SAMD_NVM_CALIBRATION 0x00806020U
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#define SAMD_NVM_SERIAL(n) (0x0080A00CU + (0x30U * (((n) + 3U) / 4U)) + ((n) * 4U))
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/* -------------------------------------------------------------------------- */
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/* Device Service Unit (DSU) Registers */
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/* -------------------------------------------------------------------------- */
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#define SAMD_DSU 0x41002000
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#define SAMD_DSU_EXT_ACCESS (SAMD_DSU + 0x100)
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#define SAMD_DSU_CTRLSTAT (SAMD_DSU_EXT_ACCESS + 0x0)
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#define SAMD_DSU_ADDRESS (SAMD_DSU_EXT_ACCESS + 0x4)
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#define SAMD_DSU_LENGTH (SAMD_DSU_EXT_ACCESS + 0x8)
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#define SAMD_DSU_DID (SAMD_DSU_EXT_ACCESS + 0x018)
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#define SAMD_DSU_PID (SAMD_DSU + 0x1000)
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#define SAMD_DSU_CID (SAMD_DSU + 0x1010)
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#define SAMD_DSU 0x41002000U
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#define SAMD_DSU_EXT_ACCESS (SAMD_DSU + 0x100U)
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#define SAMD_DSU_CTRLSTAT (SAMD_DSU_EXT_ACCESS + 0x0U)
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#define SAMD_DSU_ADDRESS (SAMD_DSU_EXT_ACCESS + 0x4U)
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#define SAMD_DSU_LENGTH (SAMD_DSU_EXT_ACCESS + 0x8U)
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#define SAMD_DSU_DID (SAMD_DSU_EXT_ACCESS + 0x018U)
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#define SAMD_DSU_PID (SAMD_DSU + 0x1000U)
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#define SAMD_DSU_CID (SAMD_DSU + 0x1010U)
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/* Control and Status Register (CTRLSTAT) */
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#define SAMD_CTRL_CHIP_ERASE (1 << 4)
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#define SAMD_CTRL_MBIST (1 << 3)
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#define SAMD_CTRL_CRC (1 << 2)
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#define SAMD_STATUSA_PERR (1 << 12)
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#define SAMD_STATUSA_FAIL (1 << 11)
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#define SAMD_STATUSA_BERR (1 << 10)
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#define SAMD_STATUSA_CRSTEXT (1 << 9)
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#define SAMD_STATUSA_DONE (1 << 8)
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#define SAMD_STATUSB_PROT (1 << 16)
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#define SAMD_CTRL_CHIP_ERASE (1U << 4U)
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#define SAMD_CTRL_MBIST (1U << 3U)
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#define SAMD_CTRL_CRC (1U << 2U)
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#define SAMD_STATUSA_PERR (1U << 12U)
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#define SAMD_STATUSA_FAIL (1U << 11U)
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#define SAMD_STATUSA_BERR (1U << 10U)
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#define SAMD_STATUSA_CRSTEXT (1U << 9U)
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#define SAMD_STATUSA_DONE (1U << 8U)
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#define SAMD_STATUSB_PROT (1U << 16U)
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/* Device Identification Register (DID) */
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#define SAMD_DID_MASK 0xFF380000
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#define SAMD_DID_CONST_VALUE 0x10000000
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#define SAMD_DID_DEVSEL_MASK 0xFF
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#define SAMD_DID_DEVSEL_POS 0
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#define SAMD_DID_REVISION_MASK 0x0F
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#define SAMD_DID_REVISION_POS 8
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#define SAMD_DID_SERIES_MASK 0x1F
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#define SAMD_DID_SERIES_POS 16
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#define SAMD_DID_FAMILY_MASK 0x3F
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#define SAMD_DID_FAMILY_POS 23
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#define SAMD_DID_MASK 0xFF380000U
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#define SAMD_DID_CONST_VALUE 0x10000000U
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#define SAMD_DID_DEVSEL_MASK 0xFFU
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#define SAMD_DID_DEVSEL_POS 0U
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#define SAMD_DID_REVISION_MASK 0x0FU
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#define SAMD_DID_REVISION_POS 8U
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#define SAMD_DID_SERIES_MASK 0x1FU
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#define SAMD_DID_SERIES_POS 16U
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#define SAMD_DID_FAMILY_MASK 0x3FU
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#define SAMD_DID_FAMILY_POS 23U
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/* Peripheral ID */
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#define SAMD_PID_MASK 0x00F7FFFF
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#define SAMD_PID_CONST_VALUE 0x0001FCD0
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#define SAMD_PID_MASK 0x00F7FFFFU
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#define SAMD_PID_CONST_VALUE 0x0001FCD0U
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/* Component ID */
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#define SAMD_CID_VALUE 0xB105100D
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#define SAMD_CID_VALUE 0xB105100DU
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/* Family parts */
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struct samd_part {
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