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platforms/f072: updated the platform definition

This commit is contained in:
dragonmux 2022-06-08 06:14:55 -04:00 committed by Piotr Esden-Tempski
parent 20e09abed2
commit 3e6bd6cdf2
1 changed files with 12 additions and 11 deletions
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23
src/platforms/f072/platform.h
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@ -90,20 +90,20 @@
#define SWDIO_MODE_DRIVE() \ #define SWDIO_MODE_DRIVE() \
gpio_mode_setup(SWDIO_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, SWDIO_PIN); gpio_mode_setup(SWDIO_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, SWDIO_PIN);
#define USB_DRIVER st_usbfs_v2_usb_driver
/* FIXME: Does st_usbfs_v2_usb_driver work on F3 with 128 Bytes buffer*/ /* FIXME: Does st_usbfs_v2_usb_driver work on F3 with 128 Bytes buffer*/
#define USART_DMA_BUF_SIZE 64 #define USART_DMA_BUF_SIZE 64
#define USB_DRIVER st_usbfs_v2_usb_driver
#define USB_IRQ NVIC_USB_IRQ #define USB_IRQ NVIC_USB_IRQ
#define USB_ISR usb_isr #define USB_ISR(x) usb_isr(x)
/* Interrupt priorities. Low numbers are high priority. /* Interrupt priorities. Low numbers are high priority.
* For now USART1 preempts USB which may spin while buffer is drained. * For now USART1 preempts USB which may spin while buffer is drained.
* TIM3 is used for traceswo capture and must be highest priority. * TIM3 is used for traceswo capture and must be highest priority.
*/ */
#define IRQ_PRI_USB (1 << 6) #define IRQ_PRI_USB (1 << 6)
#define IRQ_PRI_USBUSART (2 << 6) #define IRQ_PRI_USBUSART (2 << 6)
#define IRQ_PRI_USBUSART_DMA (2 << 6) #define IRQ_PRI_USBUSART_DMA (2 << 6)
#define IRQ_PRI_TRACE (0 << 6) #define IRQ_PRI_TRACE (0 << 6)
#define USBUSART USART2 #define USBUSART USART2
#define USBUSART_CR1 USART2_CR1 #define USBUSART_CR1 USART2_CR1
@ -111,9 +111,8 @@
#define USBUSART_RDR USART2_RDR #define USBUSART_RDR USART2_RDR
#define USBUSART_IRQ NVIC_USART2_IRQ #define USBUSART_IRQ NVIC_USART2_IRQ
#define USBUSART_CLK RCC_USART2 #define USBUSART_CLK RCC_USART2
#define USBUSART_TX_PORT GPIOA #define USBUSART_PORT GPIOA
#define USBUSART_TX_PIN GPIO3 #define USBUSART_TX_PIN GPIO3
#define USBUSART_RX_PORT GPIOA
#define USBUSART_RX_PIN GPIO2 #define USBUSART_RX_PIN GPIO2
#define USBUSART_ISR(x) usart2_isr(x) #define USBUSART_ISR(x) usart2_isr(x)
@ -122,7 +121,9 @@
/* This needs corresponding remapping bit cleared in the SYSCFG_CFGR1. /* This needs corresponding remapping bit cleared in the SYSCFG_CFGR1.
* As we come out of reset, the bit is cleared!*/ * As we come out of reset, the bit is cleared!*/
#define USBUSART_DMA_TX_CHAN DMA_CHANNEL4 #define USBUSART_DMA_TX_CHAN DMA_CHANNEL4
#define USBUSART_DMA_TX_ISR(x) dma1_channel4_7_isr(x)
#define USBUSART_DMA_RX_CHAN DMA_CHANNEL5 #define USBUSART_DMA_RX_CHAN DMA_CHANNEL5
#define USBUSART_DMA_RX_ISR(x) dma2_channel3_5_isr(x)
#define USBUSART_DMA_RXTX_IRQ NVIC_DMA1_CHANNEL4_7_DMA2_CHANNEL3_5_IRQ #define USBUSART_DMA_RXTX_IRQ NVIC_DMA1_CHANNEL4_7_DMA2_CHANNEL3_5_IRQ
#define USBUSART_DMA_RXTX_ISR(x) dma1_channel4_7_dma2_channel3_5_isr(x) #define USBUSART_DMA_RXTX_ISR(x) dma1_channel4_7_dma2_channel3_5_isr(x)
@ -130,9 +131,9 @@
/* TX/RX on the REV 0/1 boards are swapped against ftdijtag.*/ /* TX/RX on the REV 0/1 boards are swapped against ftdijtag.*/
#define UART_PIN_SETUP() do { \ #define UART_PIN_SETUP() do { \
gpio_mode_setup(USBUSART_TX_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, \ gpio_mode_setup(USBUSART_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, \
USBUSART_TX_PIN | USBUSART_RX_PIN); \ USBUSART_TX_PIN | USBUSART_RX_PIN); \
gpio_set_af(USBUSART_TX_PORT, GPIO_AF1, \ gpio_set_af(USBUSART_PORT, GPIO_AF1, \
USBUSART_TX_PIN | USBUSART_RX_PIN); \ USBUSART_TX_PIN | USBUSART_RX_PIN); \
USART2_CR2 |= USART_CR2_SWAP; \ USART2_CR2 |= USART_CR2_SWAP; \
} while(0) } while(0)