nrf51: Use buffered direct write to flash.
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@ -11,7 +11,7 @@ endif
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CFLAGS=-Os -std=gnu99 -mcpu=cortex-m0 -mthumb -I../../../libopencm3/include
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ASFLAGS=-mcpu=cortex-m3 -mthumb
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all: lmi.stub stm32l4.stub nrf51.stub efm32.stub
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all: lmi.stub stm32l4.stub efm32.stub
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%.o: %.c
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$(Q)echo " CC $<"
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@ -1,37 +0,0 @@
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/*
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* This file is part of the Black Magic Debug project.
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*
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* Copyright (C) 2017 Black Sphere Technologies Ltd.
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* Written by Gareth McMullin <gareth@blacksphere.co.nz>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdint.h>
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#include "stub.h"
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/* Non-Volatile Memory Controller (NVMC) Registers */
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#define NVMC ((volatile uint32_t *)0x4001E000)
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#define NVMC_READY NVMC[0x100]
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void __attribute__((naked))
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nrf51_flash_write_stub(volatile uint32_t *dest, uint32_t *src, uint32_t size)
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{
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for (int i; i < size; i += 4) {
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*dest++ = *src++;
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while (!(NVMC_READY & 1))
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;
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}
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stub_exit(0);
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}
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@ -83,13 +83,6 @@ const struct command_s nrf51_read_cmd_list[] = {
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#define NRF51_PAGE_SIZE 1024
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#define NRF52_PAGE_SIZE 4096
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#define SRAM_BASE 0x20000000
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#define STUB_BUFFER_BASE ALIGN(SRAM_BASE + sizeof(nrf51_flash_write_stub), 4)
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static const uint16_t nrf51_flash_write_stub[] = {
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#include "flashstub/nrf51.stub"
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};
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static void nrf51_add_flash(target *t,
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uint32_t addr, size_t length, size_t erasesize)
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{
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@ -192,22 +185,18 @@ static int nrf51_flash_write(struct target_flash *f,
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/* Enable write */
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target_mem_write32(t, NRF51_NVMC_CONFIG, NRF51_NVMC_CONFIG_WEN);
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/* Poll for NVMC_READY */
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while (target_mem_read32(t, NRF51_NVMC_READY) == 0)
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if(target_check_error(t))
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return -1;
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/* Write stub and data to target ram and call stub */
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target_mem_write(t, SRAM_BASE, nrf51_flash_write_stub,
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sizeof(nrf51_flash_write_stub));
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target_mem_write(t, STUB_BUFFER_BASE, src, len);
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int ret = cortexm_run_stub(t, SRAM_BASE, dest,
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STUB_BUFFER_BASE, len, 0);
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target_mem_write(t, dest, src, len);
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/* Poll for NVMC_READY */
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while (target_mem_read32(t, NRF51_NVMC_READY) == 0)
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if(target_check_error(t))
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return -1;
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/* Return to read-only */
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target_mem_write32(t, NRF51_NVMC_CONFIG, NRF51_NVMC_CONFIG_REN);
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return ret;
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return 0;
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}
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static bool nrf51_cmd_erase_all(target *t)
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