target/efm32: general formatting/style cleanup
Signed-off-by: Rafael Silva <perigoso@riseup.net>
This commit is contained in:
Rafael Silva
Rachel Mant
parent
018fc517a1
commit
42d36d9d10
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@ -31,7 +31,6 @@
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*/
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/* Refer to the family reference manuals:
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*
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*
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* Also refer to AN0062 "Programming Internal Flash Over the Serial Wire Debug Interface"
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* http://www.silabs.com/Support%20Documents/TechnicalDocs/an0062.pdf
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@ -63,11 +62,9 @@ const struct command_s efm32_cmd_list[] = {
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{"serial", (cmd_handler)efm32_cmd_serial, "Prints unique number"},
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{"efm_info", (cmd_handler)efm32_cmd_efm_info, "Prints information about the device"},
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{"bootloader", (cmd_handler)efm32_cmd_bootloader, "Bootloader status in CLW0"},
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{NULL, NULL, NULL}
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{NULL, NULL, NULL},
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};
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/* -------------------------------------------------------------------------- */
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/* Memory System Controller (MSC) Registers */
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/* -------------------------------------------------------------------------- */
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@ -97,7 +94,6 @@ const struct command_s efm32_cmd_list[] = {
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#define EFM32_MSC_STATUS_INVADDR (1 << 2)
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#define EFM32_MSC_STATUS_WDATAREADY (1 << 3)
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/* -------------------------------------------------------------------------- */
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/* Flash Infomation Area */
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/* -------------------------------------------------------------------------- */
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@ -108,7 +104,6 @@ const struct command_s efm32_cmd_list[] = {
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#define EFM32_V1_DI (EFM32_INFO + 0x8000)
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#define EFM32_V2_DI (EFM32_INFO + 0x81B0)
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/* -------------------------------------------------------------------------- */
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/* Lock Bits (LB) */
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/* -------------------------------------------------------------------------- */
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@ -122,7 +117,7 @@ const struct command_s efm32_cmd_list[] = {
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#define EFM32_CLW0_PINRESETSOFT (1 << 2)
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/* -------------------------------------------------------------------------- */
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/* Device Information (DI) Area - Version 1 V1 */
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/* Device Information (DI) Area - Version 1 */
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/* -------------------------------------------------------------------------- */
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#define EFM32_V1_DI_CMU_LFRCOCTRL (EFM32_V1_DI + 0x020)
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@ -183,7 +178,7 @@ const struct command_s efm32_cmd_list[] = {
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#define EFM32_V1_DI_EUI_SILABS 0x000b57
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/* -------------------------------------------------------------------------- */
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/* Device Information (DI) Area - Version 2 V2 */
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/* Device Information (DI) Area - Version 2 */
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/* -------------------------------------------------------------------------- */
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#define EFM32_V2_DI_CAL (EFM32_V2_DI + 0x000) /* CRC of DI-page and calibration temperature */
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@ -338,7 +333,6 @@ efm32_device_t const efm32_devices[] = {
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{63, true, 2048, "EFR32FG14V", 0x400e0000, 2048, 16384, "Flex Gecko"},
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};
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/* miscchip */
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typedef struct efm32_v2_di_miscchip_t {
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uint8_t pincount;
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@ -369,16 +363,14 @@ efm32_v2_di_tempgrade_t const efm32_v2_di_tempgrades[] = {
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{0, "-40 to 85degC"},
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{1, "-40 to 125degC"},
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{2, "-40 to 105degC"},
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{3, "0 to 70degC"}
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{3, "0 to 70degC"},
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};
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/* -------------------------------------------------------------------------- */
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/* Helper functions - Version 1 V1 */
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/* Helper functions */
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/* -------------------------------------------------------------------------- */
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/**
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* Reads the EFM32 Extended Unique Identifier EUI64 (V1)
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*/
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/* Reads the EFM32 Extended Unique Identifier EUI64 (V1) */
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static uint64_t efm32_v1_read_eui64(target *t)
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{
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uint64_t eui;
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@ -389,23 +381,7 @@ static uint64_t efm32_v1_read_eui64(target *t)
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return eui;
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}
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#if 0
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/**
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* Reads the EFM32 Extended Unique Identifier EUI48 (V2)
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*/
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static uint64_t efm32_v2_read_eui48(target *t)
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{
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uint64_t eui;
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eui = (uint64_t)target_mem_read32(t, EFM32_V2_DI_EUI48H) << 32;
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eui |= (uint64_t)target_mem_read32(t, EFM32_V2_DI_EUI48L) << 0;
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return eui;
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}
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#endif
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/**
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* Reads the Unique Number (DI V2 only)
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*/
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/* Reads the Unique Number (DI V2 only) */
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static uint64_t efm32_v2_read_unique(target *t, uint8_t di_version)
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{
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uint64_t unique;
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@ -419,9 +395,7 @@ static uint64_t efm32_v2_read_unique(target *t, uint8_t di_version)
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}
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}
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/**
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* Reads the EFM32 flash size in kiB
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*/
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/* Reads the EFM32 flash size in kiB */
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static uint16_t efm32_read_flash_size(target *t, uint8_t di_version)
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{
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switch (di_version) {
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@ -433,9 +407,8 @@ static uint16_t efm32_read_flash_size(target *t, uint8_t di_version)
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return 0;
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}
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}
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/**
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* Reads the EFM32 RAM size in kiB
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*/
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/* Reads the EFM32 RAM size in kiB */
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static uint16_t efm32_read_ram_size(target *t, uint8_t di_version)
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{
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switch (di_version) {
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@ -447,9 +420,10 @@ static uint16_t efm32_read_ram_size(target *t, uint8_t di_version)
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return 0;
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}
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}
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/**
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* Reads the EFM32 reported flash page size in bytes. Note: This
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* driver ignores this value, and uses a conservative hard-coded
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* driver ignores this value and uses a conservative hard-coded
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* value. There are errata on the value reported by the EFM32
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* eg. DI_101
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*/
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@ -471,10 +445,7 @@ static uint32_t efm32_flash_page_size(target *t, uint8_t di_version)
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return (1 << (mem_info_page_size + 10)); /* uint8_t ovf here */
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}
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/**
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* Reads the EFM32 Part Number
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*/
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/* Reads the EFM32 Part Number */
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static uint16_t efm32_read_part_number(target *t, uint8_t di_version)
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{
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switch (di_version) {
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@ -486,9 +457,8 @@ static uint16_t efm32_read_part_number(target *t, uint8_t di_version)
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return 0;
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}
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}
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/**
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* Reads the EFM32 Part Family
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*/
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/* Reads the EFM32 Part Family */
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static uint8_t efm32_read_part_family(target *t, uint8_t di_version)
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{
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switch (di_version) {
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@ -500,9 +470,8 @@ static uint8_t efm32_read_part_family(target *t, uint8_t di_version)
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return 0;
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}
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}
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/**
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* Reads the EFM32 Radio part number (EZR parts with V1 DI only)
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*/
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/* Reads the EFM32 Radio part number (EZR parts with V1 DI only) */
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static uint16_t efm32_read_radio_part_number(target *t, uint8_t di_version)
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{
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switch (di_version) {
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@ -513,9 +482,7 @@ static uint16_t efm32_read_radio_part_number(target *t, uint8_t di_version)
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}
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}
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/**
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* Reads the EFM32 Misc. Chip definitions
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*/
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/* Reads the EFM32 Misc. Chip definitions */
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static efm32_v2_di_miscchip_t efm32_v2_read_miscchip(target *t, uint8_t di_version)
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{
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uint32_t meminfo;
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@ -537,9 +504,7 @@ static efm32_v2_di_miscchip_t efm32_v2_read_miscchip(target *t, uint8_t di_versi
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/* Shared Functions */
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/* -------------------------------------------------------------------------- */
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static void efm32_add_flash(target *t, target_addr addr, size_t length,
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size_t page_size)
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static void efm32_add_flash(target *t, target_addr addr, size_t length, size_t page_size)
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{
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struct target_flash *f = calloc(1, sizeof(*f));
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if (!f) { /* calloc failed: heap exhaustion */
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@ -556,9 +521,7 @@ static void efm32_add_flash(target *t, target_addr addr, size_t length,
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target_add_flash(t, f);
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}
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/**
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* Lookup device
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*/
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/* Lookup device */
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static size_t efm32_lookup_device_index(target *t, uint8_t di_version)
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{
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uint8_t part_family = efm32_read_part_family(t, di_version);
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@ -569,8 +532,9 @@ static size_t efm32_lookup_device_index(target *t, uint8_t di_version)
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return i;
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}
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}
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/* Unknown family */
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return 9999;
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return UINT32_MAX;
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}
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static efm32_device_t const *efm32_get_device(size_t index)
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@ -581,9 +545,7 @@ static efm32_device_t const * efm32_get_device(size_t index)
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return &efm32_devices[index];
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}
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/**
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* Probe
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*/
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/* Probe */
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struct efm32_priv_s {
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char efm32_variant_string[60];
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};
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@ -605,7 +567,7 @@ bool efm32_probe(target *t)
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return false;
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}
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/* Check the OUI in the EUI is silabs or energymicro.
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/* Check if the OUI in the EUI is silabs or energymicro.
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* Use this to identify the Device Identification (DI) version */
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uint64_t oui24 = ((efm32_v1_read_eui64(t) >> 40) & 0xFFFFFF);
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if (oui24 == EFM32_V1_DI_EUI_SILABS) {
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@ -643,15 +605,14 @@ bool efm32_probe(target *t)
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struct efm32_priv_s *priv_storage = calloc(1, sizeof(*priv_storage));
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t->target_storage = (void *)priv_storage;
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snprintf(priv_storage->efm32_variant_string,
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sizeof(priv_storage->efm32_variant_string), "%c\b%c\b%s %d F%d %s",
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di_version + 48, (uint8_t)device_index + 32,
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device->name, part_number, flash_kib, device->description);
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snprintf(priv_storage->efm32_variant_string, sizeof(priv_storage->efm32_variant_string), "%c\b%c\b%s %d F%d %s",
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di_version + 48, (uint8_t)device_index + 32, device->name, part_number, flash_kib, device->description);
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/* Setup Target */
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t->target_options |= CORTEXM_TOPT_INHIBIT_NRST;
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t->driver = priv_storage->efm32_variant_string;
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tc_printf(t, "flash size %d page size %d\n", flash_size, flash_page_size);
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target_add_ram(t, SRAM_BASE, ram_size);
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efm32_add_flash(t, 0x00000000, flash_size, flash_page_size);
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if (device->user_data_size) { /* optional User Data (UD) section */
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@ -660,14 +621,13 @@ bool efm32_probe(target *t)
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if (device->bootloader_size) { /* optional Bootloader (BL) section */
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efm32_add_flash(t, 0x0fe10000, device->bootloader_size, flash_page_size);
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}
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target_add_commands(t, efm32_cmd_list, "EFM32");
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return true;
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}
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/**
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* Erase flash row by row
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*/
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/* Erase flash row by row */
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static int efm32_flash_erase(struct target_flash *f, target_addr addr, size_t len)
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{
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target *t = f->t;
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@ -680,7 +640,7 @@ static int efm32_flash_erase(struct target_flash *f, target_addr addr, size_t le
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/* Unlock */
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target_mem_write32(t, EFM32_MSC_LOCK(msc), EFM32_MSC_LOCK_LOCKKEY);
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/* Set WREN bit to enabel MSC write and erase functionality */
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/* Set WREN bit to enable MSC write and erase functionality */
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target_mem_write32(t, EFM32_MSC_WRITECTRL(msc), 1);
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while (len) {
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@ -707,11 +667,8 @@ static int efm32_flash_erase(struct target_flash *f, target_addr addr, size_t le
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return 0;
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}
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/**
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* Write flash page by page
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*/
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static int efm32_flash_write(struct target_flash *f,
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target_addr dest, const void *src, size_t len)
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/* Write flash page by page */
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static int efm32_flash_write(struct target_flash *f, target_addr dest, const void *src, size_t len)
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{
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(void)len;
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target *t = f->t;
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@ -720,13 +677,11 @@ static int efm32_flash_write(struct target_flash *f,
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return true;
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}
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/* Write flashloader */
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target_mem_write(t, SRAM_BASE, efm32_flash_write_stub,
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sizeof(efm32_flash_write_stub));
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target_mem_write(t, SRAM_BASE, efm32_flash_write_stub, sizeof(efm32_flash_write_stub));
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/* Write Buffer */
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target_mem_write(t, STUB_BUFFER_BASE, src, len);
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/* Run flashloader */
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int ret = cortexm_run_stub(t, SRAM_BASE, dest, STUB_BUFFER_BASE, len,
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device->msc_addr);
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int ret = cortexm_run_stub(t, SRAM_BASE, dest, STUB_BUFFER_BASE, len, device->msc_addr);
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#ifdef ENABLE_DEBUG
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/* Check the MSC_IF */
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@ -737,9 +692,7 @@ static int efm32_flash_write(struct target_flash *f,
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return ret;
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}
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/**
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* Uses the MSC ERASEMAIN0 command to erase the entire flash
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*/
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/* Uses the MSC ERASEMAIN0/1 command to erase the entire flash */
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static bool efm32_mass_erase(target *t)
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{
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efm32_device_t const* device = efm32_get_device(t->driver[2] - 32);
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@ -748,7 +701,7 @@ static bool efm32_mass_erase(target *t)
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}
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uint32_t msc = device->msc_addr;
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/* Set WREN bit to enabel MSC write and erase functionality */
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/* Set WREN bit to enable MSC write and erase functionality */
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target_mem_write32(t, EFM32_MSC_WRITECTRL(msc), 1);
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/* Unlock mass erase */
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@ -772,9 +725,7 @@ static bool efm32_mass_erase(target *t)
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return true;
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}
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/**
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* Reads the 40-bit unique number
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*/
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/* Reads the 40-bit unique number */
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static bool efm32_cmd_serial(target *t, int argc, const char **argv)
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{
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(void)argc;
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@ -797,9 +748,8 @@ static bool efm32_cmd_serial(target *t, int argc, const char **argv)
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return true;
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}
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/**
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* Prints various information we know about the device
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*/
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/* Prints various information we know about the device */
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static bool efm32_cmd_efm_info(target *t, int argc, const char **argv)
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{
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(void)argc;
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@ -831,11 +781,10 @@ static bool efm32_cmd_efm_info(target *t, int argc, const char **argv)
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uint32_t flash_page_size_reported = efm32_flash_page_size(t, di_version);
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uint32_t flash_page_size = device->flash_page_size;
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tc_printf(t, "%s %d F%d = %s %dkiB flash, %dkiB ram\n",
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device->name, part_number, flash_kib,
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device->description, flash_kib, ram_kib);
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tc_printf(t, "Device says flash page size is %d bytes, we're using %d bytes\n",
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flash_page_size_reported, flash_page_size);
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tc_printf(t, "%s %d F%d = %s %dkiB flash, %dkiB ram\n", device->name, part_number, flash_kib, device->description,
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flash_kib, ram_kib);
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tc_printf(t, "Device says flash page size is %d bytes, we're using %d bytes\n", flash_page_size_reported,
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flash_page_size);
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if (flash_page_size_reported < flash_page_size) {
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tc_printf(t, "This is bad, flash writes may be corrupted\n");
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}
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@ -846,14 +795,12 @@ static bool efm32_cmd_efm_info(target *t, int argc, const char **argv)
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efm32_v2_di_pkgtype_t const *pkgtype = NULL;
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efm32_v2_di_tempgrade_t const *tempgrade;
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for (size_t i = 0; i < (sizeof(efm32_v2_di_pkgtypes) /
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sizeof(efm32_v2_di_pkgtype_t)); i++) {
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for (size_t i = 0; i < (sizeof(efm32_v2_di_pkgtypes) / sizeof(efm32_v2_di_pkgtype_t)); i++) {
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if (efm32_v2_di_pkgtypes[i].pkgtype == miscchip.pkgtype) {
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pkgtype = &efm32_v2_di_pkgtypes[i];
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}
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}
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for (size_t i = 0; i < (sizeof(efm32_v2_di_tempgrades) /
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sizeof(efm32_v2_di_tempgrade_t)); i++) {
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for (size_t i = 0; i < (sizeof(efm32_v2_di_tempgrades) / sizeof(efm32_v2_di_tempgrade_t)); i++) {
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if (efm32_v2_di_tempgrades[i].tempgrade == miscchip.tempgrade) {
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tempgrade = &efm32_v2_di_tempgrades[i];
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}
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@ -896,8 +843,7 @@ static bool efm32_cmd_bootloader(target *t, int argc, const char **argv)
|
|||
bool bootloader_status = (clw0 & EFM32_CLW0_BOOTLOADER_ENABLE) ? 1 : 0;
|
||||
|
||||
if (argc == 1) {
|
||||
tc_printf(t, "Bootloader %s\n",
|
||||
bootloader_status ? "enabled" : "disabled");
|
||||
tc_printf(t, "Bootloader %s\n", bootloader_status ? "enabled" : "disabled");
|
||||
return true;
|
||||
} else {
|
||||
bootloader_status = (argv[1][0] == 'e');
|
||||
|
|
@ -929,10 +875,11 @@ static bool efm32_cmd_bootloader(target *t, int argc, const char **argv)
|
|||
return true;
|
||||
}
|
||||
|
||||
/* -------------------------------------------------------------------------- */
|
||||
/* Authentication Access Port (AAP) */
|
||||
/* -------------------------------------------------------------------------- */
|
||||
|
||||
/*** Authentication Access Port (AAP) **/
|
||||
|
||||
/* There's an additional AP on the SW-DP is accessable when the part
|
||||
/* There's an additional AP on the SW-DP that is accessible when the part
|
||||
* is almost entirely locked.
|
||||
*
|
||||
* The AAP can be used to issue a DEVICEERASE command, which erases:
|
||||
|
|
@ -945,7 +892,7 @@ static bool efm32_cmd_bootloader(target *t, int argc, const char **argv)
|
|||
* * Bootloader (BL) if present
|
||||
*
|
||||
* Once the DEVICEERASE command has completed, the main AP will be
|
||||
* accessable again. If the device has a bootloader, it will attempt
|
||||
* accessible again. If the device has a bootloader, it will attempt
|
||||
* to boot from this. If you have just unlocked the device the
|
||||
* bootloader could be anything (even garbage, if the bootloader
|
||||
* wasn't used before the DEVICEERASE). Therefore you may want to
|
||||
|
|
@ -972,9 +919,7 @@ static bool efm32_cmd_bootloader(target *t, int argc, const char **argv)
|
|||
|
||||
static bool efm32_aap_mass_erase(target *t);
|
||||
|
||||
/**
|
||||
* AAP Probe
|
||||
*/
|
||||
/* AAP Probe */
|
||||
struct efm32_aap_priv_s {
|
||||
char aap_driver_string[42];
|
||||
};
|
||||
|
|
@ -1001,9 +946,7 @@ void efm32_aap_probe(ADIv5_AP_t *ap)
|
|||
DEBUG_INFO("EFM32: AAP STATUS=%08" PRIx32 "\n", adiv5_ap_read(ap, AAP_STATUS));
|
||||
|
||||
struct efm32_aap_priv_s *priv_storage = calloc(1, sizeof(*priv_storage));
|
||||
sprintf(priv_storage->aap_driver_string,
|
||||
"EFM32 Authentication Access Port rev.%d",
|
||||
aap_revision);
|
||||
sprintf(priv_storage->aap_driver_string, "EFM32 Authentication Access Port rev.%d", aap_revision);
|
||||
t->driver = priv_storage->aap_driver_string;
|
||||
t->regs_size = 4;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue