Rewrote stm32f1 stub in C and call with parameters in registers.
This commit is contained in:
parent
c2462a6788
commit
437aedda11
|
@ -11,7 +11,11 @@ endif
|
|||
CFLAGS=-mcpu=cortex-m3 -mthumb -I../libopencm3/include
|
||||
ASFLAGS=-mcpu=cortex-m3 -mthumb
|
||||
|
||||
all: lmi.stub stm32.stub stm32f4.stub nrf51.stub
|
||||
all: lmi.stub stm32f4.stub nrf51.stub stm32f1.stub
|
||||
|
||||
stm32f1.o: stm32f1.c
|
||||
$(Q)echo " CC $<"
|
||||
$(Q)$(CC) $(CFLAGS) -DSTM32F1 -o $@ -c $<
|
||||
|
||||
%.o: %.s
|
||||
$(Q)echo " AS $<"
|
||||
|
|
|
@ -1,43 +0,0 @@
|
|||
.global _start
|
||||
|
||||
_start:
|
||||
ldr r0, _flashbase
|
||||
ldr r1, _addr
|
||||
mov r2, pc
|
||||
add r2, #(_data - . - 2)
|
||||
ldr r3, _size
|
||||
mov r5, #1
|
||||
_next:
|
||||
cmp r3, #0
|
||||
beq _done
|
||||
@ Write PG command to FLASH_CR
|
||||
str r5, [r0, #0x10]
|
||||
@ Write data to flash (half-word)
|
||||
ldrh r4, [r2]
|
||||
strh r4, [r1]
|
||||
|
||||
_wait: @ Wait for BSY bit to clear
|
||||
ldr r4, [r0, #0x0C]
|
||||
mov r6, #1
|
||||
tst r4, r6
|
||||
bne _wait
|
||||
|
||||
sub r3, #2
|
||||
add r1, #2
|
||||
add r2, #2
|
||||
b _next
|
||||
_done:
|
||||
bkpt
|
||||
|
||||
@.align 4
|
||||
.org 0x28
|
||||
_flashbase:
|
||||
.word 0x40022000
|
||||
_addr:
|
||||
.word 0
|
||||
_size:
|
||||
.word 12
|
||||
_data:
|
||||
.word 0xAAAAAAAA
|
||||
.word 0xBBBBBBBB
|
||||
.word 0xCCCCCCCC
|
|
@ -1 +0,0 @@
|
|||
0x4809, 0x490A, 0x467A, 0x322C, 0x4B09, 0x2501, 0x2B00, 0xD00A, 0x6105, 0x8814, 0x800C, 0x68C4, 0x2601, 0x4234, 0xD1FB, 0x3B02, 0x3102, 0x3202, 0xE7F2, 0xBE00, 0x2000, 0x4002, 0x0000, 0x0000, 0x000C, 0x0000, 0xAAAA, 0xAAAA, 0xBBBB, 0xBBBB, 0xCCCC, 0xCCCC,
|
|
@ -0,0 +1,34 @@
|
|||
/*
|
||||
* This file is part of the Black Magic Debug project.
|
||||
*
|
||||
* Copyright (C) 2015 Black Sphere Technologies Ltd.
|
||||
* Written by Gareth McMullin <gareth@blacksphere.co.nz>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#include "libopencm3/stm32/flash.h"
|
||||
|
||||
void __attribute__((naked))
|
||||
stm32f1_flash_write_stub(uint16_t *dest, uint16_t *src, uint32_t size)
|
||||
{
|
||||
while (size) {
|
||||
FLASH_CR = FLASH_CR_PG;
|
||||
*dest++ = *src++;
|
||||
size -= 2;
|
||||
while (FLASH_SR & FLASH_SR_BSY)
|
||||
;
|
||||
}
|
||||
asm("bkpt");
|
||||
}
|
||||
|
|
@ -0,0 +1 @@
|
|||
0x4613, 0xE010, 0x4A09, 0x2401, 0x6014, 0x4602, 0x1C90, 0x460C, 0x1CA1, 0x8824, 0x8014, 0x3B02, 0xBF00, 0x4A05, 0x6812, 0xF002, 0x0201, 0x2A00, 0xD1F9, 0x2B00, 0xD1EC, 0xBE00, 0x2010, 0x4002, 0x200C, 0x4002,
|
|
@ -38,5 +38,7 @@
|
|||
#define DEBUG printf
|
||||
#endif
|
||||
|
||||
#define ALIGN(x, n) (((x) + (n) - 1) & ~((n) - 1))
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
@ -36,8 +36,6 @@
|
|||
#include "command.h"
|
||||
#include "gdb_packet.h"
|
||||
|
||||
#define SRAM_BASE 0x20000000
|
||||
|
||||
static bool stm32f1_cmd_erase_mass(target *t);
|
||||
static bool stm32f1_cmd_option(target *t, int argc, char *argv[]);
|
||||
|
||||
|
@ -123,9 +121,12 @@ static const char stm32hd_xml_memory_map[] = "<?xml version=\"1.0\"?>"
|
|||
#define DBGMCU_IDCODE_F0 0x40015800
|
||||
|
||||
static const uint16_t stm32f1_flash_write_stub[] = {
|
||||
#include "../flashstub/stm32.stub"
|
||||
#include "../flashstub/stm32f1.stub"
|
||||
};
|
||||
|
||||
#define SRAM_BASE 0x20000000
|
||||
#define STUB_BUFFER_BASE ALIGN(SRAM_BASE + sizeof(stm32f1_flash_write_stub), 4)
|
||||
|
||||
bool stm32f1_probe(struct target_s *target)
|
||||
{
|
||||
target->idcode = target_mem_read32(target, DBGMCU_IDCODE) & 0xfff;
|
||||
|
@ -247,22 +248,18 @@ static int stm32f1_flash_write(struct target_s *target, uint32_t dest,
|
|||
const uint8_t *src, size_t len)
|
||||
{
|
||||
uint32_t offset = dest % 4;
|
||||
uint32_t words = (offset + len + 3) / 4;
|
||||
if (words > 256)
|
||||
return -1;
|
||||
uint32_t data[2 + words];
|
||||
uint8_t data[ALIGN(offset + len, 4)];
|
||||
|
||||
/* Construct data buffer used by stub */
|
||||
data[0] = dest - offset;
|
||||
data[1] = words * 4; /* length must always be a multiple of 4 */
|
||||
data[2] = 0xFFFFFFFF; /* pad partial words with all 1s to avoid */
|
||||
data[words + 1] = 0xFFFFFFFF; /* damaging overlapping areas */
|
||||
memcpy((uint8_t *)&data[2] + offset, src, len);
|
||||
/* pad partial words with all 1s to avoid damaging overlapping areas */
|
||||
memset(data, 0xff, sizeof(data));
|
||||
memcpy((uint8_t *)data + offset, src, len);
|
||||
|
||||
/* Write stub and data to target ram and set PC */
|
||||
target_mem_write(target, 0x2000002C, data, sizeof(data));
|
||||
cortexm_run_stub(target, SRAM_BASE, stm32f1_flash_write_stub, 0x2C,
|
||||
0, 0, 0, 0);
|
||||
target_mem_write(target, STUB_BUFFER_BASE, data, sizeof(data));
|
||||
cortexm_run_stub(target, SRAM_BASE, stm32f1_flash_write_stub,
|
||||
sizeof(stm32f1_flash_write_stub),
|
||||
dest - offset, STUB_BUFFER_BASE, sizeof(data), 0);
|
||||
|
||||
/* Check for error */
|
||||
if (target_mem_read32(target, FLASH_SR) & SR_ERROR_MASK)
|
||||
|
|
Loading…
Reference in New Issue