Changes to the USBUART to make it less likely to drop characters at higher baud rates.
USB UART seems to work fine at 115.2Kbps or 230.4Kbps, but starts to drop characters as the data rate goes higher. This commit changes the usbuart ISR to fill a software FIFO, and adds a low priority timer interrupt to run deferred processing to drain a FIFO and send USB CDCACM packets, rather than calling the usb send within the UART ISR. Tested on native platform, up to 1.5MBps.
This commit is contained in:
Allen Ibara
Gareth McMullin
parent
f1ea5ed8f9
commit
43f7e7a3cf
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@ -112,6 +112,7 @@ extern usbd_device *usbdev;
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*/
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#define IRQ_PRI_USB (2 << 4)
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#define IRQ_PRI_USBUSART (1 << 4)
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#define IRQ_PRI_USBUSART_TIM (3 << 4)
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#define IRQ_PRI_TRACE (0 << 4)
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#define USBUSART USART3
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@ -124,6 +125,10 @@ extern usbd_device *usbdev;
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#define USBUSART_RX_PORT GPIOD
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#define USBUSART_RX_PIN GPIO9
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#define USBUSART_ISR usart3_isr
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#define USBUSART_TIM TIM4
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#define USBUSART_TIM_CLK_EN() rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM4EN)
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#define USBUSART_TIM_IRQ NVIC_TIM4_IRQ
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#define USBUSART_TIM_ISR tim4_isr
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#define UART_PIN_SETUP() do { \
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gpio_mode_setup(USBUSART_TX_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, \
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@ -108,8 +108,6 @@ int platform_init(void)
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systick_interrupt_enable();
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systick_counter_enable();
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usbuart_init();
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if (platform_hwversion() > 0) {
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adc_init();
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} else {
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@ -121,6 +119,7 @@ int platform_init(void)
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SCB_VTOR = 0x2000; // Relocate interrupt vector table here
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cdcacm_init();
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usbuart_init();
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jtag_scan(NULL);
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@ -122,6 +122,7 @@ extern usbd_device *usbdev;
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*/
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#define IRQ_PRI_USB (2 << 4)
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#define IRQ_PRI_USBUSART (1 << 4)
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#define IRQ_PRI_USBUSART_TIM (3 << 4)
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#define IRQ_PRI_USB_VBUS (14 << 4)
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#define IRQ_PRI_TRACE (0 << 4)
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@ -133,6 +134,10 @@ extern usbd_device *usbdev;
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#define USBUSART_PORT GPIOA
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#define USBUSART_TX_PIN GPIO9
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#define USBUSART_ISR usart1_isr
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#define USBUSART_TIM TIM4
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#define USBUSART_TIM_CLK_EN() rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM4EN)
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#define USBUSART_TIM_IRQ NVIC_TIM4_IRQ
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#define USBUSART_TIM_ISR tim4_isr
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#define TRACE_TIM TIM3
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#define TRACE_TIM_CLK_EN() rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM3EN)
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@ -107,6 +107,7 @@ extern usbd_device *usbdev;
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*/
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#define IRQ_PRI_USB (2 << 4)
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#define IRQ_PRI_USBUSART (1 << 4)
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#define IRQ_PRI_USBUSART_TIM (3 << 4)
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#define IRQ_PRI_USB_VBUS (14 << 4)
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#define IRQ_PRI_TIM3 (0 << 4)
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@ -118,6 +119,10 @@ extern usbd_device *usbdev;
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#define USBUSART_PORT GPIOA
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#define USBUSART_TX_PIN GPIO2
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#define USBUSART_ISR usart2_isr
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#define USBUSART_TIM TIM4
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#define USBUSART_TIM_CLK_EN() rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM4EN)
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#define USBUSART_TIM_IRQ NVIC_TIM4_IRQ
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#define USBUSART_TIM_ISR tim4_isr
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#define DEBUG(...)
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@ -21,6 +21,7 @@
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#include <libopencm3/stm32/rcc.h>
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#include <libopencm3/stm32/gpio.h>
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#include <libopencm3/stm32/usart.h>
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#include <libopencm3/stm32/timer.h>
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#include <libopencm3/cm3/nvic.h>
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#include <libopencm3/cm3/scs.h>
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#include <libopencm3/usb/usbd.h>
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@ -28,6 +29,20 @@
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#include <platform.h>
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#define USBUART_TIMER_FREQ_HZ 1000000U /* 1us per tick */
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#define USBUART_RUN_FREQ_HZ 5000U /* 200us (or 100 characters at 2Mbps) */
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#define FIFO_SIZE 128
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/* RX Fifo buffer */
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static uint8_t buf_rx[FIFO_SIZE];
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/* Fifo in pointer, writes assumed to be atomic, should be only incremented within RX ISR */
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static uint8_t buf_rx_in;
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/* Fifo out pointer, writes assumed to be atomic, should be only incremented outside RX ISR */
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static uint8_t buf_rx_out;
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static void usbuart_run(void);
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void usbuart_init(void)
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{
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#if defined(BLACKMAGIC)
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@ -56,6 +71,62 @@ void usbuart_init(void)
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USBUSART_CR1 |= USART_CR1_RXNEIE;
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nvic_set_priority(USBUSART_IRQ, IRQ_PRI_USBUSART);
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nvic_enable_irq(USBUSART_IRQ);
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/* Setup timer for running deferred FIFO processing */
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USBUSART_TIM_CLK_EN();
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timer_reset(USBUSART_TIM);
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timer_set_mode(USBUSART_TIM, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
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timer_set_prescaler(USBUSART_TIM, rcc_ppre2_frequency/TIMER_FREQ_HZ*2 - 1);
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timer_set_period(USBUSART_TIM, TIMER_FREQ_HZ/USBUART_RUN_FREQ_HZ - 1);
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/* Setup update interrupt in NVIC */
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nvic_set_priority(USBUSART_TIM_IRQ, IRQ_PRI_USBUSART_TIM);
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nvic_enable_irq(USBUSART_TIM_IRQ);
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/* turn the timer on */
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timer_enable_counter(USBUSART_TIM);
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}
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/*
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* Runs deferred processing for usb uart rx, draining RX FIFO by sending characters to host PC via CDCACM.
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* Allowed to read from FIFO in pointer, but not write to it. Allowed to write to FIFO out pointer.
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*/
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static void usbuart_run(void)
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{
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/* forcibly empty fifo if no USB endpoint */
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if (cdcacm_get_config() != 1)
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{
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buf_rx_out = buf_rx_in;
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}
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/* if fifo empty, nothing further to do */
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if (buf_rx_in == buf_rx_out) {
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/* turn off LED, disable IRQ */
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timer_disable_irq(USBUSART_TIM, TIM_DIER_UIE);
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gpio_clear(LED_PORT_UART, LED_UART);
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}
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else
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{
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uint8_t packet_buf[CDCACM_PACKET_SIZE];
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uint8_t packet_size = 0;
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uint8_t buf_out = buf_rx_out;
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/* copy from uart FIFO into local usb packet buffer */
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while (buf_rx_in != buf_out && packet_size < CDCACM_PACKET_SIZE)
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{
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packet_buf[packet_size++] = buf_rx[buf_out++];
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/* wrap out pointer */
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if (buf_out >= FIFO_SIZE)
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{
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buf_out = 0;
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}
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}
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/* advance fifo out pointer by amount written */
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buf_rx_out = (buf_rx_out + usbd_ep_write_packet(usbdev, CDCACM_UART_ENDPOINT, packet_buf, packet_size)) % FIFO_SIZE;
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}
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}
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void usbuart_set_line_coding(struct usb_cdc_line_coding *coding)
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@ -108,41 +179,48 @@ void usbuart_usb_out_cb(usbd_device *dev, uint8_t ep)
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gpio_clear(LED_PORT_UART, LED_UART);
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}
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static uint8_t uart_usb_buf[CDCACM_PACKET_SIZE];
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static uint8_t uart_usb_buf_size;
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void usbuart_usb_in_cb(usbd_device *dev, uint8_t ep)
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{
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if (!uart_usb_buf_size) {
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gpio_clear(LED_PORT_UART, LED_UART);
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return;
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}
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usbd_ep_write_packet(dev, ep, uart_usb_buf, uart_usb_buf_size);
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uart_usb_buf_size = 0;
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(void) dev;
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(void) ep;
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}
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/*
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* Read a character from the UART RX and stuff it in a software FIFO.
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* Allowed to read from FIFO out pointer, but not write to it. Allowed to write to FIFO in pointer.
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*/
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void USBUSART_ISR(void)
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{
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char c = usart_recv(USBUSART);
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/* Don't try to write until we are configured.
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* Otherwise enumeration hanged in some cases.
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*/
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if (cdcacm_get_config() != 1)
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return;
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/* Turn on LED */
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gpio_set(LED_PORT_UART, LED_UART);
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/* Try to send now */
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if (usbd_ep_write_packet(usbdev, CDCACM_UART_ENDPOINT, &c, 1) == 1)
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return;
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/* If the next increment of rx_in would put it at the same point
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* as rx_out, the FIFO is considered full.
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*/
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if (((buf_rx_in + 1) % FIFO_SIZE) != buf_rx_out)
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{
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/* insert into FIFO */
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buf_rx[buf_rx_in++] = c;
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/* We failed, so queue for later */
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if (uart_usb_buf_size == CDCACM_PACKET_SIZE) {
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/* Drop if the buffer's full: we have no flow control */
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return;
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/* wrap out pointer */
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if (buf_rx_in >= FIFO_SIZE)
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{
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buf_rx_in = 0;
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}
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uart_usb_buf[uart_usb_buf_size++] = c;
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/* enable deferred processing if we put data in the FIFO */
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timer_enable_irq(USBUSART_TIM, TIM_DIER_UIE);
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}
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}
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void USBUSART_TIM_ISR(void)
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{
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/* need to clear timer update event */
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timer_clear_flag(USBUSART_TIM, TIM_SR_UIF);
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/* process FIFO */
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usbuart_run();
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}
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@ -106,6 +106,7 @@ extern usbd_device *usbdev;
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*/
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#define IRQ_PRI_USB (2 << 4)
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#define IRQ_PRI_USBUSART (1 << 4)
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#define IRQ_PRI_USBUSART_TIM (3 << 4)
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#define IRQ_PRI_USB_VBUS (14 << 4)
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#define IRQ_PRI_TRACE (0 << 4)
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@ -117,6 +118,10 @@ extern usbd_device *usbdev;
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#define USBUSART_PORT GPIOB
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#define USBUSART_TX_PIN GPIO6
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#define USBUSART_ISR usart1_isr
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#define USBUSART_TIM TIM4
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#define USBUSART_TIM_CLK_EN() rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM4EN)
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#define USBUSART_TIM_IRQ NVIC_TIM4_IRQ
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#define USBUSART_TIM_ISR tim4_isr
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#define TRACE_TIM TIM2
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#define TRACE_TIM_CLK_EN() rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM2EN)
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