Add support for burning flash on lpc4337.
This commit is contained in:
Allen Ibara
Gareth McMullin
parent
4065169caf
commit
510d1c0dc8
460
src/lpc43xx.c
460
src/lpc43xx.c
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@ -17,12 +17,138 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stddef.h>
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#include "command.h"
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#include "general.h"
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#include "adiv5.h"
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#include "target.h"
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#define LPC43XX_CHIPID 0x40043200
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#define ARM_CPUID 0xE000ED00
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#define ARM_THUMB_BREAKPOINT 0xBE00
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#define R_MSP 17 // Main stack pointer register number
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#define R_PC 15 // Program counter register number
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#define R_LR 14 // Link register number
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#define IAP_ENTRYPOINT_LOCATION 0x10400100
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#define LPC43XX_ETBAHB_SRAM_BASE 0x2000C000
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#define LPC43XX_ETBAHB_SRAM_SIZE (16*1024)
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#define IAP_RAM_SIZE LPC43XX_ETBAHB_SRAM_SIZE
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#define IAP_RAM_BASE LPC43XX_ETBAHB_SRAM_BASE
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#define IAP_PGM_CHUNKSIZE 4096
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#define IAP_CMD_INIT 49
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#define IAP_CMD_PREPARE 50
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#define IAP_CMD_PROGRAM 51
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#define IAP_CMD_ERASE 52
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#define IAP_CMD_BLANKCHECK 53
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#define IAP_CMD_SET_ACTIVE_BANK 60
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#define IAP_STATUS_CMD_SUCCESS 0
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#define IAP_STATUS_INVALID_COMMAND 1
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#define IAP_STATUS_SRC_ADDR_ERROR 2
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#define IAP_STATUS_DST_ADDR_ERROR 3
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#define IAP_STATUS_SRC_ADDR_NOT_MAPPED 4
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#define IAP_STATUS_DST_ADDR_NOT_MAPPED 5
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#define IAP_STATUS_COUNT_ERROR 6
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#define IAP_STATUS_INVALID_SECTOR 7
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#define IAP_STATUS_SECTOR_NOT_BLANK 8
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#define IAP_STATUS_SECTOR_NOT_PREPARED 9
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#define IAP_STATUS_COMPARE_ERROR 10
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#define IAP_STATUS_BUSY 11
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#define FLASH_BANK_A_BASE 0x1A000000
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#define FLASH_BANK_A_SIZE 0x80000
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#define FLASH_BANK_B_BASE 0x1B000000
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#define FLASH_BANK_B_SIZE 0x80000
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#define FLASH_NUM_BANK 2
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#define FLASH_NUM_SECTOR 15
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#define FLASH_LARGE_SECTOR_OFFSET 0x00010000
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/* CPU Frequency */
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#define CPU_CLK_KHZ 12000
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struct flash_param {
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uint16_t opcode; /* opcode to return to after calling the ROM */
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uint16_t pad0;
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uint32_t command; /* IAP command */
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union {
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uint32_t words[5]; /* command parameters */
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struct {
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uint32_t start_sector;
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uint32_t end_sector;
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uint32_t flash_bank;
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} prepare;
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struct {
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uint32_t start_sector;
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uint32_t end_sector;
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uint32_t cpu_clk_khz;
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uint32_t flash_bank;
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} erase;
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struct {
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uint32_t dest;
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uint32_t source;
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uint32_t byte_count;
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uint32_t cpu_clk_khz;
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} program;
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struct {
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uint32_t start_sector;
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uint32_t end_sector;
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uint32_t flash_bank;
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} blank_check;
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struct {
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uint32_t flash_bank;
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uint32_t cpu_clk_khz;
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} make_active;
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} params;
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uint32_t result[5]; /* result data */
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};
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struct flash_program {
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struct flash_param p;
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uint8_t data[IAP_PGM_CHUNKSIZE];
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};
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static bool lpc43xx_cmd_erase(target *t);
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static int lpc43xx_flash_init(struct target_s *target);
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static void lpc43xx_iap_call(struct target_s *target, struct flash_param *param, unsigned param_len);
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static int lpc43xx_flash_prepare(struct target_s *target, uint32_t addr, int len);
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static int lpc43xx_flash_erase(struct target_s *target, uint32_t addr, int len);
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static int lpc43xx_flash_write(struct target_s *target, uint32_t dest, const uint8_t *src, int len);
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const struct command_s lpc43xx_cmd_list[] = {
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{"erase_mass", (cmd_handler)lpc43xx_cmd_erase, "Erase entire flash memory"},
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{NULL, NULL, NULL}
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};
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/* blocksize is the erasure block size */
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static const char lpc4337_xml_memory_map[] = "<?xml version=\"1.0\"?>"
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/*
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"<!DOCTYPE memory-map "
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" PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
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"\"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
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*/
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"<memory-map>"
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" <memory type=\"ram\" start=\"0x0\" length=\"0x1A000000\"/>"
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" <memory type=\"flash\" start=\"0x1A000000\" length=\"0x10000\">"
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" <property name=\"blocksize\">0x2000</property>"
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" </memory>"
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" <memory type=\"flash\" start=\"0x1A010000\" length=\"0x70000\">"
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" <property name=\"blocksize\">0x10000</property>"
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" </memory>"
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" <memory type=\"ram\" start=\"0x1A080000\" length=\"0x00F80000\"/>"
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" <memory type=\"flash\" start=\"0x1B000000\" length=\"0x10000\">"
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" <property name=\"blocksize\">0x2000</property>"
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" </memory>"
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" <memory type=\"flash\" start=\"0x1B010000\" length=\"0x70000\">"
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" <property name=\"blocksize\">0x10000</property>"
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" </memory>"
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" <memory type=\"ram\" start=\"0x1B080000\" length=\"0xE4F80000\"/>"
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"</memory-map>";
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bool lpc43xx_probe(struct target_s *target)
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{
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@ -32,22 +158,328 @@ bool lpc43xx_probe(struct target_s *target)
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cpuid = adiv5_ap_mem_read(adiv5_target_ap(target), ARM_CPUID);
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switch(chipid) {
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case 0x4906002B: /* Parts with on-chip flash */
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case 0x5906002B: /* Flashless parts */
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case 0x6906002B:
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switch (cpuid & 0xFF00FFF0) {
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case 0x4100C240:
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target->driver = "LPC43xx Cortex-M4";
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break;
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case 0x4100C200:
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target->driver = "LPC43xx Cortex-M0";
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break;
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default:
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target->driver = "LPC43xx <Unknown>";
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}
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return true;
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case 0x4906002B: /* Parts with on-chip flash */
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switch (cpuid & 0xFF00FFF0) {
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case 0x4100C240:
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target->driver = "LPC43xx Cortex-M4";
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if (cpuid == 0x410FC241)
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{
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/* LPC4337 */
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target->xml_mem_map = lpc4337_xml_memory_map;
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target->flash_erase = lpc43xx_flash_erase;
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target->flash_write = lpc43xx_flash_write;
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target_add_commands(target, lpc43xx_cmd_list, "LPC43xx");
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}
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break;
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case 0x4100C200:
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target->driver = "LPC43xx Cortex-M0";
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break;
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default:
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target->driver = "LPC43xx <Unknown>";
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}
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return true;
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case 0x5906002B: /* Flashless parts */
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case 0x6906002B:
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switch (cpuid & 0xFF00FFF0) {
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case 0x4100C240:
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target->driver = "LPC43xx Cortex-M4";
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break;
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case 0x4100C200:
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target->driver = "LPC43xx Cortex-M0";
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break;
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default:
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target->driver = "LPC43xx <Unknown>";
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}
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return true;
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}
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return false;
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}
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static bool lpc43xx_cmd_erase(target *target)
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{
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uint32_t bank = 0;
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struct flash_program flash_pgm;
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lpc43xx_flash_init(target);
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for (bank = 0; bank < FLASH_NUM_BANK; bank++)
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{
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flash_pgm.p.command = IAP_CMD_PREPARE;
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flash_pgm.p.params.prepare.start_sector = 0;
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flash_pgm.p.params.prepare.end_sector = FLASH_NUM_SECTOR-1;
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flash_pgm.p.params.prepare.flash_bank = bank;
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flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
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lpc43xx_iap_call(target, &flash_pgm.p, sizeof(flash_pgm.p));
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if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
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return false;
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}
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flash_pgm.p.command = IAP_CMD_ERASE;
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flash_pgm.p.params.erase.start_sector = 0;
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flash_pgm.p.params.prepare.end_sector = FLASH_NUM_SECTOR-1;
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flash_pgm.p.params.erase.cpu_clk_khz = CPU_CLK_KHZ;
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flash_pgm.p.params.erase.flash_bank = bank;
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flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
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lpc43xx_iap_call(target, &flash_pgm.p, sizeof(flash_pgm.p));
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if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS)
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{
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return false;
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}
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}
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gdb_outf("Erase OK.\n");
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return true;
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}
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static int lpc43xx_flash_init(struct target_s *target)
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{
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struct flash_program flash_pgm;
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/* Initialize flash IAP */
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flash_pgm.p.command = IAP_CMD_INIT;
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flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
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lpc43xx_iap_call(target, &flash_pgm.p, sizeof(flash_pgm.p));
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if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS)
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{
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return -1;
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}
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return 0;
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}
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/**
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* @brief find a sector number given linear offset
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*/
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static int32_t flash_bank(uint32_t addr)
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{
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int32_t retVal;
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if (addr >= FLASH_BANK_A_BASE && addr < (FLASH_BANK_A_BASE+FLASH_BANK_A_SIZE))
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{
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retVal = 0;
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}
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else if (addr >= FLASH_BANK_B_BASE && addr < (FLASH_BANK_B_BASE+FLASH_BANK_B_SIZE))
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{
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retVal = 1;
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}
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else
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{
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retVal = -1;
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}
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return retVal;
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}
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/**
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* @brief find a sector number given linear offset
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*/
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static int32_t sector_number(uint32_t addr)
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{
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int32_t retVal = 0;
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int32_t bank = flash_bank(addr);
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if (bank == 0)
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{
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addr = addr - FLASH_BANK_A_BASE;
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}
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else if (bank == 1)
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{
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addr = addr - FLASH_BANK_B_BASE;
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}
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else
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{
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retVal = -1;
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}
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if (retVal != -1)
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{
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/* from 47.5 "Sector numbers" (page 1218) UM10503.pdf (Rev 1.6) */
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if (addr < FLASH_LARGE_SECTOR_OFFSET)
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{
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retVal = addr >> 13;
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}
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else
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{
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retVal = 8 + ((addr - FLASH_LARGE_SECTOR_OFFSET) >> 16);
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}
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}
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return retVal;
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}
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static void lpc43xx_iap_call(struct target_s *target, struct flash_param *param, unsigned param_len)
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{
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uint32_t regs[target->regs_size];
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uint32_t iap_entry;
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target_mem_read_words(target, &iap_entry, IAP_ENTRYPOINT_LOCATION, sizeof(iap_entry));
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/* fill out the remainder of the parameters and copy the structure to RAM */
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param->opcode = ARM_THUMB_BREAKPOINT; /* breakpoint */
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param->pad0 = 0x0000; /* pad */
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target_mem_write_words(target, IAP_RAM_BASE, (void *)param, param_len);
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/* set up for the call to the IAP ROM */
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target_regs_read(target, regs);
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regs[0] = IAP_RAM_BASE + offsetof(struct flash_param, command);
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regs[1] = IAP_RAM_BASE + offsetof(struct flash_param, result);
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regs[R_MSP] = IAP_RAM_BASE + IAP_RAM_SIZE;
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regs[R_LR] = IAP_RAM_BASE | 1;
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regs[R_PC] = iap_entry;
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target_regs_write(target, regs);
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/* start the target and wait for it to halt again */
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target_halt_resume(target, 0);
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while (!target_halt_wait(target));
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/* copy back just the parameters structure */
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target_mem_read_words(target, (void *)param, IAP_RAM_BASE, sizeof(struct flash_param));
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}
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static int lpc43xx_flash_prepare(struct target_s *target, uint32_t addr, int len)
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{
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struct flash_program flash_pgm;
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/* prepare the sector(s) to be erased */
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flash_pgm.p.command = IAP_CMD_PREPARE;
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flash_pgm.p.params.prepare.start_sector = sector_number(addr);
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flash_pgm.p.params.prepare.end_sector = sector_number(addr+len);
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flash_pgm.p.params.prepare.flash_bank = flash_bank(addr);
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flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
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lpc43xx_iap_call(target, &flash_pgm.p, sizeof(flash_pgm.p));
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if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
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return -1;
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}
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return 0;
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}
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static int
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lpc43xx_flash_erase(struct target_s *target, uint32_t addr, int len)
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{
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struct flash_program flash_pgm;
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/* min block size */
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if (addr % 8192)
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{
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return -1;
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}
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/* init */
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if (lpc43xx_flash_init(target))
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{
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return -1;
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}
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/* prepare... */
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if (lpc43xx_flash_prepare(target, addr, len))
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{
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return -1;
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}
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/* and now erase them */
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flash_pgm.p.command = IAP_CMD_ERASE;
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flash_pgm.p.params.erase.start_sector = sector_number(addr);
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flash_pgm.p.params.erase.end_sector = sector_number(addr+len);
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flash_pgm.p.params.erase.cpu_clk_khz = CPU_CLK_KHZ;
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flash_pgm.p.params.erase.flash_bank = flash_bank(addr);
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flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
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lpc43xx_iap_call(target, &flash_pgm.p, sizeof(flash_pgm.p));
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if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
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return -1;
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}
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/* check erase ok */
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flash_pgm.p.command = IAP_CMD_BLANKCHECK;
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flash_pgm.p.params.blank_check.start_sector = sector_number(addr);
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flash_pgm.p.params.blank_check.end_sector = sector_number(addr+len);
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flash_pgm.p.params.blank_check.flash_bank = flash_bank(addr);
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flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
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lpc43xx_iap_call(target, &flash_pgm.p, sizeof(flash_pgm.p));
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if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
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return -1;
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}
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return 0;
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}
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static int lpc43xx_flash_write(struct target_s *target, uint32_t dest, const uint8_t *src, int len)
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{
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unsigned first_chunk = dest / IAP_PGM_CHUNKSIZE;
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unsigned last_chunk = (dest + len - 1) / IAP_PGM_CHUNKSIZE;
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unsigned chunk_offset = dest % IAP_PGM_CHUNKSIZE;
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unsigned chunk;
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struct flash_program flash_pgm;
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for (chunk = first_chunk; chunk <= last_chunk; chunk++)
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{
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/* first and last chunk may require special handling */
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if ((chunk == first_chunk) || (chunk == last_chunk)) {
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/* fill with all ff to avoid sector rewrite corrupting other writes */
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memset(flash_pgm.data, 0xff, sizeof(flash_pgm.data));
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/* copy as much as fits */
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int copylen = IAP_PGM_CHUNKSIZE - chunk_offset;
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if (copylen > len)
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copylen = len;
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memcpy(flash_pgm.data + chunk_offset, src, copylen);
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/* update to suit */
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len -= copylen;
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src += copylen;
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chunk_offset = 0;
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} else {
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/* interior chunk, must be aligned and full-sized */
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memcpy(flash_pgm.data, src, IAP_PGM_CHUNKSIZE);
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len -= IAP_PGM_CHUNKSIZE;
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src += IAP_PGM_CHUNKSIZE;
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}
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/* prepare... */
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if (lpc43xx_flash_prepare(target, chunk * IAP_PGM_CHUNKSIZE, IAP_PGM_CHUNKSIZE))
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* copy buffer into target memory */
|
||||
target_mem_write_words(target, IAP_RAM_BASE + offsetof(struct flash_program, data), flash_pgm.data, sizeof(flash_pgm.data));
|
||||
|
||||
/* set the destination address and program */
|
||||
flash_pgm.p.command = IAP_CMD_PROGRAM;
|
||||
flash_pgm.p.params.program.dest = chunk * IAP_PGM_CHUNKSIZE;
|
||||
flash_pgm.p.params.program.source = IAP_RAM_BASE + offsetof(struct flash_program, data);
|
||||
flash_pgm.p.params.program.byte_count = IAP_PGM_CHUNKSIZE;
|
||||
flash_pgm.p.params.program.cpu_clk_khz = CPU_CLK_KHZ;
|
||||
flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
|
||||
lpc43xx_iap_call(target, &flash_pgm.p, sizeof(flash_pgm));
|
||||
if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* special command to compute/write magic vector for signature */
|
||||
if (chunk == first_chunk)
|
||||
{
|
||||
flash_pgm.p.command = IAP_CMD_SET_ACTIVE_BANK;
|
||||
flash_pgm.p.params.make_active.flash_bank = flash_bank(dest);
|
||||
flash_pgm.p.params.make_active.cpu_clk_khz = CPU_CLK_KHZ;
|
||||
flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
|
||||
lpc43xx_iap_call(target, &flash_pgm.p, sizeof(flash_pgm));
|
||||
if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue