Add STM32F7.
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@ -52,6 +52,7 @@ static int stm32f4_flash_write(struct target_flash *f,
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uint32_t dest, const void *src, size_t len);
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static const char stm32f4_driver_str[] = "STM32F4xx";
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static const char stm32f7_driver_str[] = "STM32F7xx";
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/* Flash Program ad Erase Controller Register Map */
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#define FPEC_BASE 0x40023C00
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@ -92,7 +93,16 @@ static const char stm32f4_driver_str[] = "STM32F4xx";
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#define DBGMCU_IDCODE 0xE0042000
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/* This routine is uses word access. Only usable on target voltage >2.7V */
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#define DBGMCU_CR 0xE0042004
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#define DBG_STANDBY (1 << 0)
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#define DBG_STOP (1 << 1)
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#define DBG_SLEEP (1 << 2)
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#define DBGMCU_APB1_FZ 0xE0042008
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#define DBG_WWDG_STOP (1 << 11)
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#define DBG_IWDG_STOP (1 << 12)
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/* This routine uses word access. Only usable on target voltage >2.7V */
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static const uint16_t stm32f4_flash_write_stub[] = {
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#include "../flashstub/stm32f4.stub"
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};
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@ -127,7 +137,8 @@ bool stm32f4_probe(target *t)
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uint32_t idcode;
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idcode = target_mem_read32(t, DBGMCU_IDCODE);
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switch(idcode & 0xFFF) {
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idcode &= 0xFFF;
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switch(idcode) {
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case 0x419: /* 427/437 */
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/* Second bank for 2M parts. */
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stm32f4_add_flash(t, 0x8100000, 0x10000, 0x4000, 12);
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@ -147,9 +158,21 @@ bool stm32f4_probe(target *t)
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stm32f4_add_flash(t, 0x8010000, 0x10000, 0x10000, 4);
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stm32f4_add_flash(t, 0x8020000, 0xE0000, 0x20000, 5);
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target_add_commands(t, stm32f4_cmd_list, "STM32F4");
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return true;
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break;
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case 0x449: /* F7x6 RM0385 Rev.2 */
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t->driver = stm32f7_driver_str;
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target_add_ram(t, 0x00000000, 0x4000);
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target_add_ram(t, 0x20000000, 0x50000);
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stm32f4_add_flash(t, 0x8000000, 0x20000, 0x8000, 0);
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stm32f4_add_flash(t, 0x8020000, 0x20000, 0x20000, 4);
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stm32f4_add_flash(t, 0x8040000, 0xC0000, 0x40000, 5);
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target_add_commands(t, stm32f4_cmd_list, "STM32F7");
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break;
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default:
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return false;
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}
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return false;
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t->idcode = idcode;
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return true;
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}
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static void stm32f4_flash_unlock(target *t)
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@ -258,7 +281,17 @@ static bool stm32f4_option_write(target *t, uint32_t value)
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static bool stm32f4_cmd_option(target *t, int argc, char *argv[])
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{
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uint32_t addr, val;
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uint32_t start, val;
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int len;
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if (t->idcode == 0x449) {
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start = 0x1FFF0000;
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len = 0x20;
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}
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else {
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start = 0x1FFFC000;
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len = 0x10;
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}
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if ((argc == 2) && !strcmp(argv[1], "erase")) {
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stm32f4_option_write(t, 0x0fffaaed);
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@ -271,8 +304,8 @@ static bool stm32f4_cmd_option(target *t, int argc, char *argv[])
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gdb_out("usage: monitor option write <value>\n");
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}
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for (int i = 0; i < 0xf; i += 8) {
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addr = 0x1fffC000 + i;
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for (int i = 0; i < len; i += 8) {
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uint32_t addr = start + i;
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val = target_mem_read32(t, addr);
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gdb_outf("0x%08X: 0x%04X\n", addr, val & 0xFFFF);
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}
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