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swdptap: Refactored swdptap_seq_out_parity and cleaned up

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dragonmux 2022-07-16 02:58:49 +01:00 committed by Piotr Esden-Tempski
parent da1038313f
commit 52e5357e99
1 changed files with 7 additions and 29 deletions
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36
src/platforms/common/swdptap.c
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@ -155,39 +155,17 @@ static void swdptap_seq_out(const uint32_t tms_states, const size_t clock_cycles
swdptap_seq_out_no_delay(tms_states, clock_cycles); swdptap_seq_out_no_delay(tms_states, clock_cycles);
} }
static void swdptap_seq_out_parity(uint32_t tms_states, size_t ticks) static void swdptap_seq_out_parity(const uint32_t tms_states, const size_t clock_cycles)
{ {
int parity = __builtin_popcount(tms_states); int parity = __builtin_popcount(tms_states);
#ifdef DEBUG_SWD_BITS swdptap_seq_out(tms_states, clock_cycles);
for (int i = 0; i < ticks; i++) gpio_set_val(SWDIO_PORT, SWDIO_PIN, parity & 1U);
DEBUG("%d", (tms_states & (1 << i)) ? 1 : 0);
#endif
register volatile int32_t cnt;
swdptap_turnaround(SWDIO_STATUS_DRIVE);
gpio_set_val(SWDIO_PORT, SWDIO_PIN, tms_states & 1);
tms_states >>= 1;
if (swd_delay_cnt) {
while (ticks--) {
gpio_set(SWCLK_PORT, SWCLK_PIN); gpio_set(SWCLK_PORT, SWCLK_PIN);
for(cnt = swd_delay_cnt; --cnt > 0;); for (volatile int32_t cnt = swd_delay_cnt - 2; cnt > 0; cnt--)
gpio_set_val(SWDIO_PORT, SWDIO_PIN, tms_states & 1); continue;
tms_states >>= 1;
gpio_clear(SWCLK_PORT, SWCLK_PIN); gpio_clear(SWCLK_PORT, SWCLK_PIN);
for(cnt = swd_delay_cnt; --cnt > 0;); for (volatile int32_t cnt = swd_delay_cnt - 2; cnt > 0; cnt--)
} continue;
} else {
while (ticks--) {
gpio_set(SWCLK_PORT, SWCLK_PIN);
gpio_set_val(SWDIO_PORT, SWDIO_PIN, tms_states & 1);
tms_states >>= 1;
gpio_clear(SWCLK_PORT, SWCLK_PIN);
}
}
gpio_set_val(SWDIO_PORT, SWDIO_PIN, parity & 1);
gpio_set(SWCLK_PORT, SWCLK_PIN);
for(cnt = swd_delay_cnt; --cnt > 0;);
gpio_clear(SWCLK_PORT, SWCLK_PIN);
for(cnt = swd_delay_cnt; --cnt > 0;);
} }
int swdptap_init(ADIv5_DP_t *dp) int swdptap_init(ADIv5_DP_t *dp)