Merge pull request #223 from gsmcmullin/nrf51_c_stub
nrf51: Replace stub with C version and pass params in registers
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commit
539d9e14ec
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@ -0,0 +1,37 @@
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/*
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* This file is part of the Black Magic Debug project.
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*
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* Copyright (C) 2017 Black Sphere Technologies Ltd.
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* Written by Gareth McMullin <gareth@blacksphere.co.nz>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdint.h>
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#include "stub.h"
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/* Non-Volatile Memory Controller (NVMC) Registers */
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#define NVMC ((volatile uint32_t *)0x4001E000)
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#define NVMC_READY NVMC[0x100]
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void __attribute__((naked))
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nrf51_flash_write_stub(volatile uint32_t *dest, uint32_t *src, uint32_t size)
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{
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for (int i; i < size; i += 4) {
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*dest++ = *src++;
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while (!(NVMC_READY & 1))
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;
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}
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stub_exit(0);
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}
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@ -1,40 +0,0 @@
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.global _start
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_start:
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ldr r0, _ready
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ldr r1, _addr
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mov r2, pc
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add r2, #(_data - . - 2)
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ldr r3, _size
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_next:
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cmp r3, #0
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beq _done
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@ Write data to flash
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ldr r4, [r2]
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str r4, [r1]
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_wait: @ Wait for READY bit
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ldr r4, [r0]
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mov r6, #1
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tst r4, r6
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beq _wait
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sub r3, #4
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add r1, #4
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add r2, #4
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b _next
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_done:
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bkpt
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@.align 4
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.org 0x24
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_ready:
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.word 0x4001E400
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_addr:
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.word 0
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_size:
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.word 12
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_data:
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.word 0xAAAAAAAA
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.word 0xBBBBBBBB
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.word 0xCCCCCCCC
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@ -1 +1 @@
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0x4808, 0x4909, 0x467A, 0x3228, 0x4B08, 0x2B00, 0xD009, 0x6814, 0x600C, 0x6804, 0x2601, 0x4234, 0xD0FB, 0x3B04, 0x3104, 0x3204, 0xE7F3, 0xBE00, 0xE400, 0x4001, 0x0000, 0x0000, 0x000C, 0x0000, 0xAAAA, 0xAAAA, 0xBBBB, 0xBBBB, 0xCCCC, 0xCCCC,
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0x2300, 0x2601, 0x4D06, 0x1AC9, 0x18C4, 0x429A, 0xD800, 0xBE00, 0x58CF, 0x6027, 0x682C, 0x4234, 0xD0FC, 0x3304, 0xE7F4, 0x46C0, 0xE400, 0x4001,
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@ -82,7 +82,7 @@ const struct command_s nrf51_read_cmd_list[] = {
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#define NRF52_PAGE_SIZE 4096
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#define SRAM_BASE 0x20000000
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#define STUB_BUFFER_BASE (SRAM_BASE + 0x28)
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#define STUB_BUFFER_BASE ALIGN(SRAM_BASE + sizeof(nrf51_flash_write_stub), 4)
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static const uint16_t nrf51_flash_write_stub[] = {
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#include "flashstub/nrf51.stub"
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@ -219,14 +219,6 @@ static int nrf51_flash_write(struct target_flash *f,
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target_addr dest, const void *src, size_t len)
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{
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target *t = f->t;
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uint32_t data[2 + len/4];
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/* FIXME rewrite stub to use register args */
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/* Construct data buffer used by stub */
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data[0] = dest;
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data[1] = len; /* length must always be a multiple of 4 */
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memcpy((uint8_t *)&data[2], src, len);
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/* Enable write */
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target_mem_write32(t, NRF51_NVMC_CONFIG, NRF51_NVMC_CONFIG_WEN);
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@ -239,13 +231,13 @@ static int nrf51_flash_write(struct target_flash *f,
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/* Write stub and data to target ram and call stub */
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target_mem_write(t, SRAM_BASE, nrf51_flash_write_stub,
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sizeof(nrf51_flash_write_stub));
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target_mem_write(t, STUB_BUFFER_BASE, data, len + 8);
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cortexm_run_stub(t, SRAM_BASE, 0, 0, 0, 0);
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target_mem_write(t, STUB_BUFFER_BASE, src, len);
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int ret = cortexm_run_stub(t, SRAM_BASE, dest,
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STUB_BUFFER_BASE, len, 0);
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/* Return to read-only */
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target_mem_write32(t, NRF51_NVMC_CONFIG, NRF51_NVMC_CONFIG_REN);
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return 0;
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return ret;
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}
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static bool nrf51_cmd_erase_all(target *t)
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@ -332,4 +324,3 @@ static bool nrf51_cmd_read(target *t, int argc, const char *argv[])
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return nrf51_cmd_read_help(t);
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}
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