platforms/f3: Introduced a new platform for the STM32F3 series
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CROSS_COMPILE ?= arm-none-eabi-
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CC = $(CROSS_COMPILE)gcc
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OBJCOPY = $(CROSS_COMPILE)objcopy
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CFLAGS += -Istm32/include -mcpu=cortex-m4 -mthumb \
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-mfloat-abi=hard -mfpu=fpv4-sp-d16 \
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-DSTM32F3 -I../libopencm3/include \
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-DDFU_SERIAL_LENGTH=13 -Iplatforms/stm32
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LDFLAGS = --specs=nano.specs -lopencm3_stm32f3 \
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-Wl,-T,platforms/f3-if/stm32f303xc.ld -nostartfiles -lc -lnosys \
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-Wl,-Map=mapfile -mthumb -mcpu=cortex-m4 -Wl,-gc-sections \
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-mfloat-abi=hard -mfpu=fpv4-sp-d16 \
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-L../libopencm3/lib
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VPATH += platforms/stm32
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SRC += cdcacm.c \
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traceswodecode.c\
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traceswo.c \
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usbuart.c \
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serialno.c \
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timing.c \
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timing_stm32.c \
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all: blackmagic.bin
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host_clean:
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-$(Q)$(RM) blackmagic.bin
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Connections:
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====================
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BOOT0: Pull low to force system bootloader entry with reset
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PA2/PA3 eventual connected to the STLINK/ STM32F103C8
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PA0: TDI
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PA1: TMS/SWDIO
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PA5: NRST
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PA6: TDO/TRACESWO
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PA7: TCK/SWCLK
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PA9: USB_DETACH_N
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PA2: UART_RX
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PA3: UART_TX
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Reflash:
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====================
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dfu-util -a0 -s 0x08000000 -D blackmagic.bin
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/*
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* This file is part of the Black Magic Debug project.
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*
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* Copyright (C) 2017 Uwe Bonnes bon@elektron,ikp,physik.tu-darmstadt.de
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* This file implements the platform specific functions for the STM32F3-IF
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* implementation.
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*/
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#include "general.h"
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#include "cdcacm.h"
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#include "usbuart.h"
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#include "morse.h"
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#include <libopencm3/stm32/f3/rcc.h>
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#include <libopencm3/cm3/scb.h>
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#include <libopencm3/cm3/nvic.h>
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#include <libopencm3/stm32/usart.h>
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#include <libopencm3/stm32/syscfg.h>
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#include <libopencm3/usb/usbd.h>
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#include <libopencm3/stm32/flash.h>
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extern uint32_t _ebss[];
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void platform_init(void)
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{
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volatile uint32_t *magic = (uint32_t *) &_ebss;
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/* If RCC_CFGR is not at it's reset value, the bootloader was executed
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* and SET_ADDRESS got us to this place. On F3, without further efforts,
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* application does not start in that case.
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* So issue an reset to allow a clean start!
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*/
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if (RCC_CFGR)
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scb_reset_system();
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SYSCFG_MEMRM &= ~3;
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/* Buttom is BOOT0, so buttom is already evaluated!*/
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if (((magic[0] == BOOTMAGIC0) && (magic[1] == BOOTMAGIC1))) {
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magic[0] = 0;
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magic[1] = 0;
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/* Jump to the built in bootloader by mapping System flash.
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As we just come out of reset, no other deinit is needed!*/
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SYSCFG_MEMRM |= 1;
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scb_reset_core();
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}
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rcc_clock_setup_pll(&rcc_hse8mhz_configs[RCC_CLOCK_HSE8_72MHZ]);
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/* Enable peripherals */
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rcc_periph_clock_enable(RCC_GPIOA);
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rcc_periph_clock_enable(RCC_GPIOB);
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rcc_periph_clock_enable(RCC_CRC);
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rcc_periph_clock_enable(RCC_USB);
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/* Disconnect USB after reset:
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* Pull USB_DP low. Device will reconnect automatically
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* when USB is set up later, as Pull-Up is hard wired*/
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gpio_mode_setup(GPIOA, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO12);
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gpio_clear(GPIOA, GPIO12);
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gpio_set_output_options(GPIOA, GPIO_OTYPE_OD, GPIO_OSPEED_2MHZ, GPIO12);
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rcc_periph_reset_pulse(RST_USB);
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GPIOA_OSPEEDR &= ~0xF00C;
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GPIOA_OSPEEDR |= 0x5004; /* Set medium speed on PA1, PA6 and PA7*/
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gpio_mode_setup(JTAG_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE,
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TMS_PIN | TCK_PIN |TDI_PIN);
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gpio_mode_setup(TDO_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, TDO_PIN);
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gpio_mode_setup(LED_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE,
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LED_UART | LED_IDLE_RUN | LED_ERROR | LED_BOOTLOADER);
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gpio_mode_setup(SRST_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, SRST_PIN);
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gpio_set(SRST_PORT, SRST_PIN);
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gpio_set_output_options(SRST_PORT, GPIO_OTYPE_OD,
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GPIO_OSPEED_2MHZ, SRST_PIN);
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platform_timing_init();
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/* Set up USB Pins and alternate function*/
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gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO11 | GPIO12);
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gpio_set_af(GPIOA, GPIO_AF14, GPIO11 | GPIO12);
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cdcacm_init();
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usbuart_init();
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}
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void platform_srst_set_val(bool assert)
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{
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gpio_set_val(SRST_PORT, SRST_PIN, !assert);
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}
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bool platform_srst_get_val(void)
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{
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return (gpio_get(SRST_PORT, SRST_PIN)) ? false : true;
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}
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const char *platform_target_voltage(void)
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{
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return "ABSENT!";
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}
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void platform_request_boot(void)
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{
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/* Bootloader cares for reenumeration */
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uint32_t *magic = (uint32_t *) &_ebss;
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magic[0] = BOOTMAGIC0;
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magic[1] = BOOTMAGIC1;
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scb_reset_system();
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}
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/*
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* This file is part of the Black Magic Debug project.
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*
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* Copyright (C) 2017 Uwe Bonnes bon@elektron,ikp,physik.tu-darmstadt.de
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* This file implements the platform specific functions for the STM32
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* implementation.
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*/
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#ifndef __PLATFORM_H
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#define __PLATFORM_H
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#include "gpio.h"
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#include "timing.h"
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#include "timing_stm32.h"
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#include <setjmp.h>
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#define PLATFORM_HAS_TRACESWO
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#ifdef ENABLE_DEBUG
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# define PLATFORM_HAS_DEBUG
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# define USBUART_DEBUG
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#endif
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#define PLATFORM_IDENT "(F3-IF) "
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/* Important pin mappings for STM32 implementation:
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*
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* LED0 = PB5 (Green LED : Running)
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* LED1 = PB6 (Orange LED : Idle)
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* LED2 = PB7 (Red LED : Error)
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*
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* TDI = PA0
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* TMS = PA1 (input for SWDP)
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* TCK = PA7/SWCLK
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* TDO = PA6 (input for TRACESWO
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* nSRST = PA5
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*
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* Force DFU mode button: BOOT0
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*/
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/* Hardware definitions... */
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#define JTAG_PORT GPIOA
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#define TDI_PORT JTAG_PORT
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#define TMS_PORT JTAG_PORT
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#define TCK_PORT JTAG_PORT
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#define TDO_PORT JTAG_PORT
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#define TDI_PIN GPIO0
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#define TMS_PIN GPIO1
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#define TCK_PIN GPIO7
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#define TDO_PIN GPIO6
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#define SWDIO_PORT JTAG_PORT
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#define SWCLK_PORT JTAG_PORT
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#define SWDIO_PIN TMS_PIN
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#define SWCLK_PIN TCK_PIN
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#define SRST_PORT GPIOA
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#define SRST_PIN GPIO5
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#define LED_PORT GPIOB
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#define LED_PORT_UART GPIOB
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#define LED_UART GPIO6
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#define LED_IDLE_RUN GPIO5
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#define LED_ERROR GPIO7
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/* PORTB does not stay active in system bootloader!*/
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#define LED_BOOTLOADER GPIO6
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#define BOOTMAGIC0 0xb007da7a
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#define BOOTMAGIC1 0xbaadfeed
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#define TMS_SET_MODE() \
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gpio_mode_setup(TMS_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, TMS_PIN);
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#define SWDIO_MODE_FLOAT() \
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gpio_mode_setup(SWDIO_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, SWDIO_PIN);
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#define SWDIO_MODE_DRIVE() \
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gpio_mode_setup(SWDIO_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, SWDIO_PIN);
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#define USB_DRIVER st_usbfs_v1_usb_driver
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#define USB_IRQ NVIC_USB_LP_CAN1_RX0_IRQ
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#define USB_ISR usb_lp_can1_rx0_isr
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/* Interrupt priorities. Low numbers are high priority.
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* TIM3 is used for traceswo capture and must be highest priority.
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*/
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#define IRQ_PRI_USB (1 << 4)
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#define IRQ_PRI_USBUSART (2 << 4)
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#define IRQ_PRI_USBUSART_DMA (2 << 4)
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#define IRQ_PRI_TRACE (0 << 4)
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#define USBUSART USART2
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#define USBUSART_CR1 USART2_CR1
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#define USBUSART_TDR USART2_TDR
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#define USBUSART_RDR USART2_RDR
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#define USBUSART_IRQ NVIC_USART2_EXTI26_IRQ
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#define USBUSART_CLK RCC_USART2
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#define USBUSART_TX_PORT GPIOA
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#define USBUSART_TX_PIN GPIO3
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#define USBUSART_RX_PORT GPIOA
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#define USBUSART_RX_PIN GPIO2
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#define USBUSART_ISR(x) usart2_exti26_isr(x)
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#define USBUSART_DMA_BUS DMA1
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#define USBUSART_DMA_CLK RCC_DMA1
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#define USBUSART_DMA_TX_CHAN DMA_CHANNEL7
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#define USBUSART_DMA_TX_IRQ NVIC_DMA1_CHANNEL7_IRQ
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#define USBUSART_DMA_TX_ISR(x) dma1_channel7_isr(x)
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#define USBUSART_DMA_RX_CHAN DMA_CHANNEL6
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#define USBUSART_DMA_RX_IRQ NVIC_DMA1_CHANNEL6_IRQ
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#define USBUSART_DMA_RX_ISR(x) dma1_channel6_isr(x)
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/* TX/RX on the REV 0/1 boards are swapped against ftdijtag.*/
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#define UART_PIN_SETUP() do { \
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gpio_mode_setup(USBUSART_TX_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, \
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USBUSART_TX_PIN | USBUSART_RX_PIN); \
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gpio_set_af(USBUSART_TX_PORT, GPIO_AF7, \
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USBUSART_TX_PIN | USBUSART_RX_PIN); \
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USART2_CR2 |= USART_CR2_SWAP; \
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} while(0)
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#define TRACE_TIM TIM3
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#define TRACE_TIM_CLK_EN() rcc_periph_clock_enable(RCC_TIM3)
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#define TRACE_IRQ NVIC_TIM3_IRQ
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#define TRACE_ISR tim3_isr
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#ifdef ENABLE_DEBUG
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extern bool debug_bmp;
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int usbuart_debug_write(const char *buf, size_t len);
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# define DEBUG printf
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#else
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# define DEBUG(...)
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#endif
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#define SET_RUN_STATE(state) {running_status = (state);}
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#define SET_IDLE_STATE(state) {gpio_set_val(LED_PORT, LED_IDLE_RUN, state);}
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#define SET_ERROR_STATE(state) {gpio_set_val(LED_PORT, LED_ERROR, state);}
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static inline int platform_hwversion(void)
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{
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return 0;
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}
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/* Use newlib provided integer only stdio functions */
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#define sscanf siscanf
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#define sprintf siprintf
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#define vasprintf vasiprintf
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#define snprintf sniprintf
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#endif
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@ -0,0 +1,30 @@
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2015 Karl Palsson <karlp@tweak.net.au>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* Linker script for the STM32F303xC chip. */
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/* Define memory regions. */
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MEMORY
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{
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rom (rx) : ORIGIN = 0x08000000, LENGTH = 256K
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 40K
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}
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/* Include the common ld script. */
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INCLUDE cortex-m-generic.ld
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