Handle STM32F730 and STM32H750.
Flash sector calculation was wrong with small flash sizes.
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@ -339,12 +339,17 @@ static bool stm32f4_attach(target *t)
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remains = banksize - 0x20000; /* 128 k in small sectors.*/
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if (is_f7) {
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stm32f4_add_flash(t, ITCM_BASE, 0x10000, 0x4000, 0, split);
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stm32f4_add_flash(t, 0x0210000, 0x10000, 0x10000, 4, split);
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stm32f4_add_flash(t, 0x0220000, remains, 0x20000, 5, split);
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if (banksize > 0x10000) {
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/* STM32F730 has only 64 kiB flash! */
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stm32f4_add_flash(t, 0x0210000, 0x10000, 0x10000, 4, split);
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stm32f4_add_flash(t, 0x0220000, remains, 0x20000, 5, split);
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}
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}
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stm32f4_add_flash(t, 0x8000000, 0x10000, 0x4000, 0, split);
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stm32f4_add_flash(t, 0x8010000, 0x10000, 0x10000, 4, split);
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stm32f4_add_flash(t, 0x8020000, remains, 0x20000, 5, split);
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if (banksize > 0x10000) {
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stm32f4_add_flash(t, 0x8010000, 0x10000, 0x10000, 4, split);
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stm32f4_add_flash(t, 0x8020000, remains, 0x20000, 5, split);
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}
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if (use_dual_bank) {
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if (is_f7) {
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uint32_t bk1 = ITCM_BASE + banksize;
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@ -187,6 +187,14 @@ static bool stm32h7_attach(target *t)
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uint32_t optsr = target_mem_read32(t, FPEC1_BASE + FLASH_OPTSR);
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if (!(optsr & FLASH_OPTSR_IWDG1_SW))
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tc_printf(t, "Hardware IWDG running. Expect failure. Set IWDG1_SW!");
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uint32_t flashsize = target_mem_read32(t, FLASH_SIZE_REG);
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flashsize &= 0xffff;
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if (flashsize == 128) { /* H750 has only 128 kByte!*/
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stm32h7_add_flash(t, 0x8000000, FLASH_SECTOR_SIZE, FLASH_SECTOR_SIZE);
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} else {
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stm32h7_add_flash(t, 0x8000000, 0x100000, FLASH_SECTOR_SIZE);
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stm32h7_add_flash(t, 0x8100000, 0x100000, FLASH_SECTOR_SIZE);
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}
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return true;
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}
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@ -213,8 +221,6 @@ bool stm32h7_probe(target *t)
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target_add_ram(t, 0x32000000, 0x20000); /* AHB SRAM2, 128 k */
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target_add_ram(t, 0x34000000, 0x08000); /* AHB SRAM3, 32 k */
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target_add_ram(t, 0x38000000, 0x01000); /* AHB SRAM4, 32 k */
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stm32h7_add_flash(t, 0x8000000, 0x100000, FLASH_SECTOR_SIZE);
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stm32h7_add_flash(t, 0x8100000, 0x100000, FLASH_SECTOR_SIZE);
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return true;
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}
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return false;
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