Temporarily enable DBG clock in stm32g0_detach(); fixes #1003
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@ -295,6 +295,16 @@ static void stm32g0_detach(target *t)
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{
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struct stm32g0_priv_s *ps = (struct stm32g0_priv_s*)t->target_storage;
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/*
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* First re-enable DBGEN clock, in case it got disabled in the meantime
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* (happens during flash), so that writes to DBG_* registers below succeed.
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*/
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target_mem_write32(t, RCC_APBENR1, ps->saved_regs.rcc_apbenr1 |
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RCC_APBENR1_DBGEN);
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/*
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* Then restore the DBG_* registers and clock settings.
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*/
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target_mem_write32(t, DBG_APB_FZ1, ps->saved_regs.dbg_apb_fz1);
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target_mem_write32(t, DBG_CR, ps->saved_regs.dbg_cr);
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target_mem_write32(t, RCC_APBENR1, ps->saved_regs.rcc_apbenr1);
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