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Temporarily enable DBG clock in stm32g0_detach(); fixes #1003

This commit is contained in:
Michal Moskal 2022-03-29 14:53:31 -07:00 committed by Rachel Mant
parent e535f53981
commit 6b465d6a77
1 changed files with 10 additions and 0 deletions
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10
src/target/stm32g0.c
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@ -295,6 +295,16 @@ static void stm32g0_detach(target *t)
{ {
struct stm32g0_priv_s *ps = (struct stm32g0_priv_s*)t->target_storage; struct stm32g0_priv_s *ps = (struct stm32g0_priv_s*)t->target_storage;
/*
* First re-enable DBGEN clock, in case it got disabled in the meantime
* (happens during flash), so that writes to DBG_* registers below succeed.
*/
target_mem_write32(t, RCC_APBENR1, ps->saved_regs.rcc_apbenr1 |
RCC_APBENR1_DBGEN);
/*
* Then restore the DBG_* registers and clock settings.
*/
target_mem_write32(t, DBG_APB_FZ1, ps->saved_regs.dbg_apb_fz1); target_mem_write32(t, DBG_APB_FZ1, ps->saved_regs.dbg_apb_fz1);
target_mem_write32(t, DBG_CR, ps->saved_regs.dbg_cr); target_mem_write32(t, DBG_CR, ps->saved_regs.dbg_cr);
target_mem_write32(t, RCC_APBENR1, ps->saved_regs.rcc_apbenr1); target_mem_write32(t, RCC_APBENR1, ps->saved_regs.rcc_apbenr1);