kinetis: Refactored out some common code from kinetis_probe for the S32K14 lineup
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@ -124,6 +124,17 @@ static void kl_gen_add_flash(target *t, uint32_t addr, size_t length,
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target_add_flash(t, f);
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}
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static void kl_s32k14_setup(
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target *const t, const uint32_t sram_l, const uint32_t sram_h, const size_t flash_size, const size_t flexmem_size)
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{
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t->driver = "S32K14x";
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target_add_ram(t, sram_l, 0x20000000 - sram_l);
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target_add_ram(t, 0x20000000, sram_h);
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kl_gen_add_flash(t, 0x00000000, flash_size, 0x1000, K64_WRITE_LEN); /* P-Flash, 4 KB Sectors */
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kl_gen_add_flash(t, 0x10000000, flexmem_size, 0x1000, K64_WRITE_LEN); /* FlexNVM, 4 KB Sectors */
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}
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bool kinetis_probe(target *t)
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{
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uint32_t sdid = target_mem_read32(t, SIM_SDID);
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@ -325,45 +336,37 @@ bool kinetis_probe(target *t)
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kl_gen_add_flash(t, 0x00000000, 0x00040000, 0x800, K64_WRITE_LEN); /* P-Flash, 256 KB, 2 KB Sectors */
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kl_gen_add_flash(t, 0x10000000, 0x00008000, 0x800, K64_WRITE_LEN); /* FlexNVM, 32 KB, 2 KB Sectors */
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break;
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/* gen1 s32k14x */
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{
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uint32_t sram_l, sram_h;
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uint32_t flash, flexmem;
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case 0x142: /* s32k142 */
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case 0x143: /* s32k142w */
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sram_l = 0x1FFFC000; /* SRAM_L, 16k */
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sram_h = 0x03000; /* SRAM_H, 12k */
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flash = 0x00040000; /* flash 256 KB */
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flexmem = 0x10000; /* FlexNVM 64 KB */
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goto do_common_s32k14x;
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case 0x144: /* s32k144 */
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case 0x145: /* s32k144w */
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sram_l = 0x1FFF8000; /* SRAM_L, 32k */
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sram_h = 0x07000; /* SRAM_H, 28k */
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flash = 0x00080000; /* flash 512 KB */
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flexmem = 0x10000; /* FlexNVM 64 KB */
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goto do_common_s32k14x;
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case 0x146: /* s32k146 */
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sram_l = 0x1fff0000; /* SRAM_L, 64k */
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sram_h = 0x0f000; /* SRAM_H, 60k */
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flash = 0x00100000; /* flash 1024 KB */
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flexmem = 0x10000; /* FlexNVM 64 KB */
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goto do_common_s32k14x;
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case 0x148: /* S32K148 */
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sram_l = 0x1ffe0000; /* SRAM_L, 128 KB */
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sram_h = 0x1f000; /* SRAM_H, 124 KB */
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flash = 0x00180000; /* flash 1536 KB */
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flexmem = 0x80000; /* FlexNVM 512 KB */
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goto do_common_s32k14x;
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do_common_s32k14x:
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t->driver = "S32K14x";
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target_add_ram(t, sram_l, 0x20000000 - sram_l);
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target_add_ram(t, 0x20000000, sram_h);
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kl_gen_add_flash(t, 0x00000000, flash, 0x1000, K64_WRITE_LEN); /* P-Flash, 4 KB Sectors */
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kl_gen_add_flash(t, 0x10000000, flexmem, 0x1000, K64_WRITE_LEN); /* FlexNVM, 4 KB Sectors */
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/* gen1 s32k14x */
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case 0x142: /* S32K142 */
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case 0x143: /* S32K142W */
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/* SRAM_L = 16KiB */
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/* SRAM_H = 12KiB */
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/* Flash = 256 KiB */
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/* FlexNVM = 64 KiB */
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kl_s32k14_setup(t, 0x1FFFC000, 0x03000, 0x00040000, 0x10000);
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break;
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case 0x144: /* S32K144 */
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case 0x145: /* S32K144W */
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/* SRAM_L = 32KiB */
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/* SRAM_H = 28KiB */
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/* Flash = 512 KiB */
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/* FlexNVM = 64 KiB */
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kl_s32k14_setup(t, 0x1FFF8000, 0x07000, 0x00080000, 0x10000);
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break;
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case 0x146: /* S32K146 */
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/* SRAM_L = 64KiB */
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/* SRAM_H = 60KiB */
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/* Flash = 1024 KiB */
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/* FlexNVM = 64 KiB */
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kl_s32k14_setup(t, 0x1fff0000, 0x0f000, 0x00100000, 0x10000);
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break;
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case 0x148: /* S32K148 */
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/* SRAM_L = 128 KiB */
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/* SRAM_H = 124 KiB */
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/* Flash = 1536 KiB */
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/* FlexNVM = 512 KiB */
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kl_s32k14_setup(t, 0x1ffe0000, 0x1f000, 0x00180000, 0x80000);
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break;
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}
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default:
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return false;
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}
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