hosted: Implement SWJ test mode (-T).
Continious read/write-back some core register as NOP operation to allow scope measurement of SWJ timing.
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f796b774bd
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7365a44989
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@ -31,6 +31,7 @@
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#include "version.h"
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#include "target.h"
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#include "target_internal.h"
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#include "cortexm.h"
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#include "cl_utils.h"
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#include "bmp_hosted.h"
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@ -140,6 +141,8 @@ static void cl_help(char **argv)
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DEBUG_WARN("\t-C\t\t: Connect under reset\n");
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DEBUG_WARN("\t-t\t\t: Scan SWD or JTAG and display information about \n"
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"\t\t\t connected devices\n");
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DEBUG_WARN("\t-T\t\t: Continious read/write-back some value to allow\n"
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"\t\t\t timing insection of SWJ. Abort with ^C\n");
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DEBUG_WARN("\t-e\t\t: Assume \"resistor SWD connection\" on FTDI: TDI\n"
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"\t\t\t connected to TMS, TDO to TDI with eventual resistor\n");
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DEBUG_WARN("\t-E\t\t: Erase flash until flash end or for given size\n");
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@ -163,7 +166,7 @@ void cl_init(BMP_CL_OPTIONS_t *opt, int argc, char **argv)
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opt->opt_target_dev = 1;
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opt->opt_flash_size = 16 * 1024 *1024;
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opt->opt_flash_start = 0xffffffff;
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while((c = getopt(argc, argv, "eEhHv:d:s:I:c:CnltVta:S:jpP:rR")) != -1) {
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while((c = getopt(argc, argv, "eEhHv:d:s:I:c:CnltVtTa:S:jpP:rR")) != -1) {
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switch(c) {
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case 'c':
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if (optarg)
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@ -212,6 +215,9 @@ void cl_init(BMP_CL_OPTIONS_t *opt, int argc, char **argv)
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opt->opt_mode = BMP_MODE_TEST;
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cl_debuglevel |= BMP_DEBUG_INFO | BMP_DEBUG_STDOUT;
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break;
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case 'T':
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opt->opt_mode = BMP_MODE_SWJ_TEST;
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break;
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case 'V':
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opt->opt_mode = BMP_MODE_FLASH_VERIFY;
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break;
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@ -262,6 +268,7 @@ void cl_init(BMP_CL_OPTIONS_t *opt, int argc, char **argv)
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}
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/* Checks */
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if ((opt->opt_flash_file) && ((opt->opt_mode == BMP_MODE_TEST ) ||
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(opt->opt_mode == BMP_MODE_SWJ_TEST) ||
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(opt->opt_mode == BMP_MODE_RESET))) {
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DEBUG_WARN("Ignoring filename in reset/test mode\n");
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opt->opt_flash_file = NULL;
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@ -369,7 +376,22 @@ int cl_execute(BMP_CL_OPTIONS_t *opt)
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}
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if (opt->opt_flash_start == 0xffffffff)
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opt->opt_flash_start = flash_start;
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if (opt->opt_mode == BMP_MODE_TEST)
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if (opt->opt_mode == BMP_MODE_SWJ_TEST) {
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switch (t->core[0]) {
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case 'M':
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DEBUG_WARN("Continious read/write-back DEMCR. Abort with ^C\n");
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while(1) {
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uint32_t demcr;
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target_mem_read(t, &demcr, CORTEXM_DEMCR, 4);
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target_mem_write32(t, CORTEXM_DEMCR, demcr);
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platform_delay(1); /* To allow trigger*/
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}
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default:
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DEBUG_WARN("No test for this core type yet\n");
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}
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}
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if ((opt->opt_mode == BMP_MODE_TEST) ||
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(opt->opt_mode == BMP_MODE_SWJ_TEST))
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goto target_detach;
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int read_file = -1;
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if ((opt->opt_mode == BMP_MODE_FLASH_WRITE) ||
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@ -33,7 +33,8 @@ enum bmp_cl_mode {
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BMP_MODE_FLASH_ERASE,
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BMP_MODE_FLASH_WRITE,
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BMP_MODE_FLASH_READ,
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BMP_MODE_FLASH_VERIFY
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BMP_MODE_FLASH_VERIFY,
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BMP_MODE_SWJ_TEST,
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};
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typedef struct BMP_CL_OPTIONS_s {
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