Merge pull request #92 from maknoll/master
Fixes #90 flashing of STM32 m0 chips
This commit is contained in:
commit
762e54060f
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@ -8,7 +8,7 @@ ifneq ($(V), 1)
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Q = @
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Q = @
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endif
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endif
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CFLAGS=-Os -std=gnu99 -mcpu=cortex-m3 -mthumb -I../libopencm3/include
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CFLAGS=-Os -std=gnu99 -mcpu=cortex-m0 -mthumb -I../libopencm3/include
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ASFLAGS=-mcpu=cortex-m3 -mthumb
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ASFLAGS=-mcpu=cortex-m3 -mthumb
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all: lmi.stub stm32f4.stub nrf51.stub stm32f1.stub
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all: lmi.stub stm32f4.stub nrf51.stub stm32f1.stub
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@ -1 +1 @@
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0x0892, 0x2300, 0x4293, 0xD20F, 0x4C08, 0x6020, 0xF851, 0x5023, 0x3408, 0xF844, 0x5C04, 0x4D06, 0x6025, 0x6825, 0xF015, 0x0F01, 0xD1FB, 0x3301, 0x3004, 0xE7ED, 0xBE00, 0xBF00, 0xD000, 0x400F, 0x0001, 0xA442,
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0x2300, 0x009C, 0x1909, 0x1C1C, 0x0892, 0x4293, 0xD20E, 0x4E08, 0x1905, 0x6035, 0x590E, 0x4D07, 0x602E, 0x4D07, 0x4E07, 0x602E, 0x682E, 0x07F6, 0xD4FC, 0x3301, 0x3404, 0xE7EE, 0xBE00, 0x46C0, 0xD000, 0x400F, 0xD004, 0x400F, 0xD008, 0x400F, 0x0001, 0xA442,
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@ -1 +1 @@
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0x2300, 0x4293, 0x4C09, 0xD20A, 0x4D09, 0x2601, 0x602E, 0x5ACD, 0x52C5, 0x6825, 0xF015, 0x0F01, 0xD1FB, 0x3302, 0xE7F1, 0x6823, 0xF013, 0x0F14, 0xD000, 0xBE01, 0xBE00, 0xBF00, 0x200C, 0x4002, 0x2010, 0x4002,
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0x2300, 0x4C09, 0x4293, 0xD209, 0x2601, 0x4D08, 0x602E, 0x5ACD, 0x52C5, 0x6825, 0x07ED, 0xD4FC, 0x3302, 0xE7F2, 0x2314, 0x6822, 0x421A, 0xD000, 0xBE01, 0xBE00, 0x200C, 0x4002, 0x2010, 0x4002,
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@ -1 +1 @@
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0x2300, 0x4293, 0x4C09, 0xD20B, 0x4D09, 0xF240, 0x2601, 0x602E, 0x58CD, 0x50C5, 0x6825, 0xF415, 0x3F80, 0xD1FB, 0x3304, 0xE7F0, 0x6823, 0xF013, 0x0FF2, 0xD000, 0xBE01, 0xBE00, 0x3C0C, 0x4002, 0x3C10, 0x4002,
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0x2300, 0x4C09, 0x4293, 0xD209, 0x4D08, 0x4E09, 0x602E, 0x58CD, 0x50C5, 0x6825, 0x03ED, 0xD4FC, 0x3304, 0xE7F2, 0x23F2, 0x6822, 0x421A, 0xD000, 0xBE01, 0xBE00, 0x3C0C, 0x4002, 0x3C10, 0x4002, 0x0201, 0x0000,
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@ -87,6 +87,9 @@ static int stm32f1_flash_write(struct target_flash *f,
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#define DBGMCU_IDCODE 0xE0042000
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#define DBGMCU_IDCODE 0xE0042000
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#define DBGMCU_IDCODE_F0 0x40015800
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#define DBGMCU_IDCODE_F0 0x40015800
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#define FLASHSIZE 0x1FFFF7E0
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#define FLASHSIZE_F0 0x1FFFF7CC
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static const uint16_t stm32f1_flash_write_stub[] = {
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static const uint16_t stm32f1_flash_write_stub[] = {
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#include "../flashstub/stm32f1.stub"
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#include "../flashstub/stm32f1.stub"
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};
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};
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@ -110,6 +113,8 @@ static void stm32f1_add_flash(target *t,
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bool stm32f1_probe(target *t)
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bool stm32f1_probe(target *t)
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{
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{
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size_t flash_size;
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size_t block_size = 0x400;
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t->idcode = target_mem_read32(t, DBGMCU_IDCODE) & 0xfff;
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t->idcode = target_mem_read32(t, DBGMCU_IDCODE) & 0xfff;
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switch(t->idcode) {
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switch(t->idcode) {
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case 0x410: /* Medium density */
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case 0x410: /* Medium density */
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@ -140,13 +145,28 @@ bool stm32f1_probe(target *t)
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t->idcode = target_mem_read32(t, DBGMCU_IDCODE_F0) & 0xfff;
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t->idcode = target_mem_read32(t, DBGMCU_IDCODE_F0) & 0xfff;
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switch(t->idcode) {
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switch(t->idcode) {
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case 0x444: /* STM32F03 RM0091 Rev.7 */
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case 0x444: /* STM32F03 RM0091 Rev.7 */
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t->driver = "STM32F03";
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break;
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case 0x445: /* STM32F04 RM0091 Rev.7 */
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case 0x445: /* STM32F04 RM0091 Rev.7 */
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t->driver = "STM32F04";
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break;
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case 0x440: /* STM32F05 RM0091 Rev.7 */
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case 0x440: /* STM32F05 RM0091 Rev.7 */
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t->driver = "STM32F05";
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break;
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case 0x448: /* STM32F07 RM0091 Rev.7 */
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case 0x448: /* STM32F07 RM0091 Rev.7 */
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t->driver = "STM32F07";
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block_size = 0x800;
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break;
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case 0x442: /* STM32F09 RM0091 Rev.7 */
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case 0x442: /* STM32F09 RM0091 Rev.7 */
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t->driver = "STM32F0";
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t->driver = "STM32F09";
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block_size = 0x800;
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break;
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}
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if (t->driver) {
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flash_size = (target_mem_read32(t, FLASHSIZE_F0) & 0xffff) *0x400;
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gdb_outf("flash size %d block_size %d\n", flash_size, block_size);
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target_add_ram(t, 0x20000000, 0x5000);
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target_add_ram(t, 0x20000000, 0x5000);
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stm32f1_add_flash(t, 0x8000000, 0x20000, 0x400);
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stm32f1_add_flash(t, 0x8000000, flash_size, block_size);
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target_add_commands(t, stm32f1_cmd_list, "STM32F0");
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target_add_commands(t, stm32f1_cmd_list, "STM32F0");
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return true;
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return true;
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}
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}
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