Merge pull request #247 from schodet/stm32f4-x8-x32
Allow programming STM32F4 when using a low voltage
This commit is contained in:
commit
7663794fdf
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@ -41,6 +41,8 @@
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#define ALIGN(x, n) (((x) + (n) - 1) & ~((n) - 1))
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#define ALIGN(x, n) (((x) + (n) - 1) & ~((n) - 1))
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#undef MIN
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#undef MIN
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#define MIN(x, y) (((x) < (y)) ? (x) : (y))
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#define MIN(x, y) (((x) < (y)) ? (x) : (y))
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#undef MAX
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#define MAX(x, y) (((x) > (y)) ? (x) : (y))
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#endif
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#endif
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@ -11,10 +11,12 @@ endif
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CFLAGS=-Os -std=gnu99 -mcpu=cortex-m0 -mthumb -I../../../libopencm3/include
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CFLAGS=-Os -std=gnu99 -mcpu=cortex-m0 -mthumb -I../../../libopencm3/include
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ASFLAGS=-mcpu=cortex-m3 -mthumb
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ASFLAGS=-mcpu=cortex-m3 -mthumb
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all: lmi.stub stm32f4.stub stm32l4.stub nrf51.stub stm32f1.stub efm32.stub
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all: lmi.stub stm32f4_x8.stub stm32f4_x32.stub stm32l4.stub nrf51.stub \
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stm32f1.stub efm32.stub
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stm32f1.o: CFLAGS += -DSTM32F1
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stm32f1.o: CFLAGS += -DSTM32F1
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stm32f4.o: CFLAGS += -DSTM32F4
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stm32f4_x8.o: CFLAGS += -DSTM32F4
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stm32f4_x32.o: CFLAGS += -DSTM32F4
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%.o: %.c
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%.o: %.c
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$(Q)echo " CC $<"
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$(Q)echo " CC $<"
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@ -23,7 +23,7 @@
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#define SR_ERROR_MASK 0xF2
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#define SR_ERROR_MASK 0xF2
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void __attribute__((naked))
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void __attribute__((naked))
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stm32f4_flash_write_stub(uint32_t *dest, uint32_t *src, uint32_t size)
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stm32f4_flash_write_x32_stub(uint32_t *dest, uint32_t *src, uint32_t size)
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{
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{
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for (int i = 0; i < size; i += 4) {
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for (int i = 0; i < size; i += 4) {
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FLASH_CR = FLASH_CR_PROGRAM_X32 | FLASH_CR_PG;
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FLASH_CR = FLASH_CR_PROGRAM_X32 | FLASH_CR_PG;
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@ -1 +1 @@
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0x2300, 0x4C0A, 0x4293, 0xD20B, 0x4E09, 0x4D0A, 0x602E, 0x58CD, 0x50C5, 0xF3BF, 0x8F4F, 0x6825, 0x03ED, 0xD4FC, 0x3304, 0xE7F0, 0x23F2, 0x6822, 0x421A, 0xD000, 0xBE01, 0xBE00, 0x3C0C, 0x4002, 0x0201, 0x0000, 0x3C10, 0x4002,
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0x2300, 0x4C0A, 0x4293, 0xD20B, 0x4E09, 0x4D0A, 0x602E, 0x58CD, 0x50C5, 0xF3BF, 0x8F4F, 0x6825, 0x03ED, 0xD4FC, 0x3304, 0xE7F0, 0x23F2, 0x6822, 0x421A, 0xD000, 0xBE01, 0xBE00, 0x3C0C, 0x4002, 0x0201, 0x0000, 0x3C10, 0x4002,
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@ -0,0 +1,44 @@
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/*
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* This file is part of the Black Magic Debug project.
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*
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* Copyright (C) 2017 Black Sphere Technologies Ltd.
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* Written by Gordon Smith <gordonhj.smith@gmail.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "libopencm3/stm32/flash.h"
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#include "stub.h"
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#define SR_ERROR_MASK 0xF2
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void __attribute__((naked))
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stm32f4_flash_write_x8_stub(uint32_t *dest, uint32_t *src, uint32_t size)
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{
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uint8_t *b_dest, *b_src;
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b_dest = (void *)dest;
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b_src = (void *)src;
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for (int i = 0; i < size; i += 1) {
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FLASH_CR = FLASH_CR_PROGRAM_X8 | FLASH_CR_PG;
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*b_dest++ = *b_src++;
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__asm("dsb");
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while (FLASH_SR & FLASH_SR_BSY)
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;
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}
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if (FLASH_SR & SR_ERROR_MASK)
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stub_exit(1);
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stub_exit(0);
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}
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@ -0,0 +1 @@
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0x2300, 0x4C0A, 0x4293, 0xD00B, 0x2601, 0x4D09, 0x602E, 0x5CCD, 0x54C5, 0xF3BF, 0x8F4F, 0x6825, 0x03ED, 0xD4FC, 0x3301, 0xE7F0, 0x23F2, 0x6822, 0x421A, 0xD000, 0xBE01, 0xBE00, 0x3C0C, 0x4002, 0x3C10, 0x4002,
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@ -37,10 +37,12 @@
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static bool stm32f4_cmd_erase_mass(target *t);
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static bool stm32f4_cmd_erase_mass(target *t);
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static bool stm32f4_cmd_option(target *t, int argc, char *argv[]);
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static bool stm32f4_cmd_option(target *t, int argc, char *argv[]);
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static bool stm32f4_cmd_psize(target *t, int argc, char *argv[]);
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const struct command_s stm32f4_cmd_list[] = {
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const struct command_s stm32f4_cmd_list[] = {
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{"erase_mass", (cmd_handler)stm32f4_cmd_erase_mass, "Erase entire flash memory"},
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{"erase_mass", (cmd_handler)stm32f4_cmd_erase_mass, "Erase entire flash memory"},
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{"option", (cmd_handler)stm32f4_cmd_option, "Manipulate option bytes"},
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{"option", (cmd_handler)stm32f4_cmd_option, "Manipulate option bytes"},
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{"psize", (cmd_handler)stm32f4_cmd_psize, "Configure flash write parallelism: (x8|x32)"},
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{NULL, NULL, NULL}
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{NULL, NULL, NULL}
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};
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};
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@ -102,12 +104,19 @@ static const char stm32f2_driver_str[] = "STM32F2xx";
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#define DBG_IWDG_STOP (1 << 12)
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#define DBG_IWDG_STOP (1 << 12)
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/* This routine uses word access. Only usable on target voltage >2.7V */
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/* This routine uses word access. Only usable on target voltage >2.7V */
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static const uint16_t stm32f4_flash_write_stub[] = {
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static const uint16_t stm32f4_flash_write_x32_stub[] = {
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#include "flashstub/stm32f4.stub"
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#include "flashstub/stm32f4_x32.stub"
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};
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/* This routine uses byte access. Usable on target voltage <2.2V */
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static const uint16_t stm32f4_flash_write_x8_stub[] = {
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#include "flashstub/stm32f4_x8.stub"
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};
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};
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#define SRAM_BASE 0x20000000
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#define SRAM_BASE 0x20000000
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#define STUB_BUFFER_BASE ALIGN(SRAM_BASE + sizeof(stm32f4_flash_write_stub), 4)
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#define STUB_BUFFER_BASE \
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ALIGN(SRAM_BASE + MAX(sizeof(stm32f4_flash_write_x8_stub), \
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sizeof(stm32f4_flash_write_x32_stub)), 4)
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#define AXIM_BASE 0x8000000
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#define AXIM_BASE 0x8000000
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#define ITCM_BASE 0x0200000
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#define ITCM_BASE 0x0200000
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@ -115,6 +124,7 @@ static const uint16_t stm32f4_flash_write_stub[] = {
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struct stm32f4_flash {
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struct stm32f4_flash {
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struct target_flash f;
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struct target_flash f;
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uint8_t base_sector;
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uint8_t base_sector;
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uint8_t psize;
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};
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};
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enum ID_STM32F47 {
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enum ID_STM32F47 {
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@ -148,6 +158,7 @@ static void stm32f4_add_flash(target *t,
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f->align = 4;
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f->align = 4;
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f->erased = 0xff;
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f->erased = 0xff;
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sf->base_sector = base_sector;
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sf->base_sector = base_sector;
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sf->psize = 32;
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target_add_flash(t, f);
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target_add_flash(t, f);
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}
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}
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@ -302,8 +313,12 @@ static int stm32f4_flash_write(struct target_flash *f,
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}
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}
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/* Write buffer to target ram call stub */
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/* Write buffer to target ram call stub */
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target_mem_write(f->t, SRAM_BASE, stm32f4_flash_write_stub,
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if (((struct stm32f4_flash *)f)->psize == 32)
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sizeof(stm32f4_flash_write_stub));
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target_mem_write(f->t, SRAM_BASE, stm32f4_flash_write_x32_stub,
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sizeof(stm32f4_flash_write_x32_stub));
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else
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target_mem_write(f->t, SRAM_BASE, stm32f4_flash_write_x8_stub,
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sizeof(stm32f4_flash_write_x8_stub));
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target_mem_write(f->t, STUB_BUFFER_BASE, src, len);
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target_mem_write(f->t, STUB_BUFFER_BASE, src, len);
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return cortexm_run_stub(f->t, SRAM_BASE, dest,
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return cortexm_run_stub(f->t, SRAM_BASE, dest,
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STUB_BUFFER_BASE, len, 0);
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STUB_BUFFER_BASE, len, 0);
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@ -534,3 +549,33 @@ static bool stm32f4_cmd_option(target *t, int argc, char *argv[])
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tc_printf(t, "\n");
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tc_printf(t, "\n");
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return true;
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return true;
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}
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}
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static bool stm32f4_cmd_psize(target *t, int argc, char *argv[])
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{
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if (argc == 1) {
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uint8_t psize = 8;
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for (struct target_flash *f = t->flash; f; f = f->next) {
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if (f->write == stm32f4_flash_write) {
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psize = ((struct stm32f4_flash *)f)->psize;
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}
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}
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tc_printf(t, "Flash write parallelism: %s\n",
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psize == 32 ? "x32" : "x8");
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} else {
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uint8_t psize;
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if (!strcmp(argv[1], "x8")) {
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psize = 8;
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} else if (!strcmp(argv[1], "x32")) {
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psize = 32;
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} else {
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tc_printf(t, "usage: monitor psize (x8|x32)\n");
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return false;
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}
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for (struct target_flash *f = t->flash; f; f = f->next) {
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if (f->write == stm32f4_flash_write) {
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((struct stm32f4_flash *)f)->psize = psize;
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}
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}
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}
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return true;
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}
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