cortexa: Fix write back of PC and CPSR.
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@ -412,13 +412,13 @@ static void cortexa_regs_write_internal(target *t)
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/* Write back the CPSR */
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write_gpreg(t, 0, priv->reg_cache.cpsr);
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apb_write(t, DBGITR, 0xe12ff000); /* msr CPSR_fsxc, r0 */
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/* Write back PC, via r0. MRC clobbers CPSR instead */
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write_gpreg(t, 0, priv->reg_cache.r[15]);
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apb_write(t, DBGITR, 0xe1a0f000); /* mov pc, r0 */
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/* Finally the GP registers now that we're done using them */
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for (int i = 0; i < 15; i++) {
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write_gpreg(t, i, priv->reg_cache.r[i]);
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}
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/* Write back PC with offset */
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write_gpreg(t, 15, priv->reg_cache.r[15] +
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(priv->reg_cache.cpsr & CPSR_THUMB) ? 4 : 8);
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}
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static void cortexa_reset(target *t)
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