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cortexm: Add target option to inhibit assersion of SRST.

This commit is contained in:
Gareth McMullin 2015-04-11 16:08:59 -07:00
parent 24122aa318
commit 9009ed6581
3 changed files with 7 additions and 2 deletions
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6
src/cortexm.c
View File

@ -418,8 +418,10 @@ static void cortexm_pc_write(target *t, const uint32_t val)
* using the core debug registers in the NVIC. */ * using the core debug registers in the NVIC. */
static void cortexm_reset(target *t) static void cortexm_reset(target *t)
{ {
jtagtap_srst(true); if ((t->target_options & CORTEXM_TOPT_INHIBIT_SRST) == 0) {
jtagtap_srst(false); jtagtap_srst(true);
jtagtap_srst(false);
}
/* Read DHCSR here to clear S_RESET_ST bit before reset */ /* Read DHCSR here to clear S_RESET_ST bit before reset */
target_mem_read32(t, CORTEXM_DHCSR); target_mem_read32(t, CORTEXM_DHCSR);

2
src/include/cortexm.h
View File

@ -153,6 +153,8 @@
#define ARM_THUMB_BREAKPOINT 0xBE00 #define ARM_THUMB_BREAKPOINT 0xBE00
#define CORTEXM_TOPT_INHIBIT_SRST (1 << 2)
bool cortexm_attach(target *t); bool cortexm_attach(target *t);
void cortexm_detach(target *t); void cortexm_detach(target *t);
void cortexm_halt_resume(target *t, bool step); void cortexm_halt_resume(target *t, bool step);

1
src/lpc43xx.c
View File

@ -110,6 +110,7 @@ bool lpc43xx_probe(target *t)
0x1B010000, 0x70000, 0x10000); 0x1B010000, 0x70000, 0x10000);
target_add_commands(t, lpc43xx_cmd_list, "LPC43xx"); target_add_commands(t, lpc43xx_cmd_list, "LPC43xx");
target_add_ram(t, 0x1B080000, 0xE4F80000UL); target_add_ram(t, 0x1B080000, 0xE4F80000UL);
t->target_options |= CORTEXM_TOPT_INHIBIT_SRST;
} }
break; break;
case 0x4100C200: case 0x4100C200: