Add support for STM32F2xx family
The F405 rev A uses a wrong CPUID, this patch use the core identifier to make the distinction. Tested with: - F205 - F405 rev Z - F429 Unfortunately, I do not have any F405 rev A.
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@ -52,6 +52,7 @@ static int stm32f4_flash_write(struct target_flash *f,
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uint32_t dest, const void *src, size_t len);
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static const char stm32f4_driver_str[] = "STM32F4xx";
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static const char stm32f2_driver_str[] = "STM32F2xx";
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/* Flash Program ad Erase Controller Register Map */
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#define FPEC_BASE 0x40023C00
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@ -91,6 +92,7 @@ static const char stm32f4_driver_str[] = "STM32F4xx";
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#define SR_EOP 0x01
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#define DBGMCU_IDCODE 0xE0042000
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#define ARM_CPUID 0xE000ED00
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/* This routine is uses word access. Only usable on target voltage >2.7V */
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static const uint16_t stm32f4_flash_write_stub[] = {
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@ -124,9 +126,23 @@ static void stm32f4_add_flash(target *t,
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bool stm32f4_probe(target *t)
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{
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bool f2 = false;
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uint32_t idcode;
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idcode = target_mem_read32(t, DBGMCU_IDCODE);
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if ((idcode & 0xFFF) == 0x411)
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{
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/* F405 revision A have a wrong IDCODE, use ARM_CPUID to make the
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* distinction with F205. Revision is also wrong (0x2000 instead
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* of 0x1000). See F40x/F41x errata. */
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uint32_t cpuid = target_mem_read32(t, ARM_CPUID);
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if ((cpuid & 0xFFF0) == 0xC240)
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idcode = 0x10000413;
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else
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f2 = true;
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}
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switch(idcode & 0xFFF) {
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case 0x419: /* 427/437 */
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/* Second bank for 2M parts. */
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@ -134,19 +150,21 @@ bool stm32f4_probe(target *t)
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stm32f4_add_flash(t, 0x8110000, 0x10000, 0x10000, 16);
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stm32f4_add_flash(t, 0x8120000, 0xE0000, 0x20000, 17);
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/* Fall through for stuff common to F40x/F41x */
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case 0x411: /* Documented to be 0x413! This is what I read... */
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case 0x413: /* F407VGT6 */
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case 0x411: /* F205 */
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case 0x413: /* F405 */
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case 0x421: /* F446 */
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case 0x423: /* F401 B/C RM0368 Rev.3 */
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case 0x431: /* F411 RM0383 Rev.4 */
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case 0x433: /* F401 D/E RM0368 Rev.3 */
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t->driver = stm32f4_driver_str;
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target_add_ram(t, 0x10000000, 0x10000);
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t->driver = f2 ? stm32f2_driver_str : stm32f4_driver_str;
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if (!f2)
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target_add_ram(t, 0x10000000, 0x10000);
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target_add_ram(t, 0x20000000, 0x30000);
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stm32f4_add_flash(t, 0x8000000, 0x10000, 0x4000, 0);
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stm32f4_add_flash(t, 0x8010000, 0x10000, 0x10000, 4);
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stm32f4_add_flash(t, 0x8020000, 0xE0000, 0x20000, 5);
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target_add_commands(t, stm32f4_cmd_list, "STM32F4");
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target_add_commands(t, stm32f4_cmd_list, f2 ? "STM32F2" :
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"STM32F4");
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return true;
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}
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return false;
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