SAM4S support
This commit is contained in:
David Lawrence
parent
9c5ffd61f7
commit
985627af7e
103
src/sam3x.c
103
src/sam3x.c
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@ -68,9 +68,22 @@ static const char sam3n_xml_memory_map[] = "<?xml version=\"1.0\"?>"
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" <memory type=\"ram\" start=\"0x20000000\" length=\"0x200000\"/>"
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"</memory-map>";
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static const char sam4s_xml_memory_map[] = "<?xml version=\"1.0\"?>"
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/* "<!DOCTYPE memory-map "
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" PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
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" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"*/
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"<memory-map>"
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" <memory type=\"flash\" start=\"0x400000\" length=\"0x400000\">"
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" <property name=\"blocksize\">0x200</property>"
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" </memory>"
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" <memory type=\"rom\" start=\"0x800000\" length=\"0x400000\"/>"
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" <memory type=\"ram\" start=\"0x20000000\" length=\"0x400000\"/>"
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"</memory-map>";
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/* Enhanced Embedded Flash Controller (EEFC) Register Map */
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#define SAM3N_EEFC_BASE 0x400E0A00
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#define SAM3X_EEFC_BASE(x) (0x400E0A00+((x)*0x400))
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#define SAM4S_EEFC_BASE(x) (0x400E0A00+((x)*0x200))
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#define EEFC_FMR(base) ((base)+0x00)
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#define EEFC_FCR(base) ((base)+0x04)
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#define EEFC_FSR(base) ((base)+0x08)
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@ -99,14 +112,18 @@ static const char sam3n_xml_memory_map[] = "<?xml version=\"1.0\"?>"
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#define SAM3X_CHIPID_CIDR 0x400E0940
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#define SAM3N_CHIPID_CIDR 0x400E0740
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#define SAM4S_CHIPID_CIDR 0x400E0740
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#define CHIPID_CIDR_VERSION_MASK (0x1F << 0)
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#define CHIPID_CIDR_EPROC_CM3 (0x03 << 5)
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#define CHIPID_CIDR_EPROC_CM4 (0x07 << 5)
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#define CHIPID_CIDR_EPROC_MASK (0x07 << 5)
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#define CHIPID_CIDR_NVPSIZ_MASK (0x0F << 8)
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#define CHIPID_CIDR_NVPSIZ_128K (0x07 << 8)
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#define CHIPID_CIDR_NVPSIZ_256K (0x09 << 8)
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#define CHIPID_CIDR_NVPSIZ_512K (0x0A << 8)
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#define CHIPID_CIDR_NVPSIZ_1024K (0x0C << 8)
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#define CHIPID_CIDR_NVPSIZ_2048K (0x0E << 8)
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#define CHIPID_CIDR_NVPSIZ2_MASK (0x0F << 12)
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#define CHIPID_CIDR_SRAMSIZ_MASK (0x0F << 16)
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#define CHIPID_CIDR_ARCH_MASK (0xFF << 20)
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@ -116,12 +133,16 @@ static const char sam3n_xml_memory_map[] = "<?xml version=\"1.0\"?>"
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#define CHIPID_CIDR_ARCH_SAM3NxA (0x93 << 20)
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#define CHIPID_CIDR_ARCH_SAM3NxB (0x94 << 20)
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#define CHIPID_CIDR_ARCH_SAM3NxC (0x95 << 20)
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#define CHIPID_CIDR_ARCH_SAM4SxA (0x88 << 20)
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#define CHIPID_CIDR_ARCH_SAM4SxB (0x89 << 20)
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#define CHIPID_CIDR_ARCH_SAM4SxC (0x8A << 20)
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#define CHIPID_CIDR_NVPTYP_MASK (0x07 << 28)
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#define CHIPID_CIDR_NVPTYP_FLASH (0x02 << 28)
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#define CHIPID_CIDR_NVPTYP_ROM_FLASH (0x03 << 28)
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#define CHIPID_CIDR_EXT (0x01 << 31)
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#define PAGE_SIZE 256
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#define SAM3_PAGE_SIZE 256
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#define SAM4_PAGE_SIZE 512
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bool sam3x_probe(struct target_s *target)
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{
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@ -155,6 +176,19 @@ bool sam3x_probe(struct target_s *target)
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return true;
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}
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target->idcode = adiv5_ap_mem_read(ap, SAM4S_CHIPID_CIDR);
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switch (target->idcode & (CHIPID_CIDR_ARCH_MASK | CHIPID_CIDR_EPROC_MASK)) {
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case CHIPID_CIDR_ARCH_SAM4SxA | CHIPID_CIDR_EPROC_CM4:
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case CHIPID_CIDR_ARCH_SAM4SxB | CHIPID_CIDR_EPROC_CM4:
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case CHIPID_CIDR_ARCH_SAM4SxC | CHIPID_CIDR_EPROC_CM4:
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target->driver = "Atmel SAM4S";
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target->xml_mem_map = sam4s_xml_memory_map;
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target->flash_erase = sam3x_flash_erase;
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target->flash_write = sam3x_flash_write;
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target_add_commands(target, sam3x_cmd_list, "SAM4S");
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return true;
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}
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return false;
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}
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@ -203,6 +237,33 @@ sam3x_flash_base(struct target_s *target, uint32_t addr, uint32_t *offset)
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}
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}
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if (strcmp(target->driver, "Atmel SAM4S") == 0) {
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uint32_t half = -1;
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switch (target->idcode & CHIPID_CIDR_NVPSIZ_MASK) {
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case CHIPID_CIDR_NVPSIZ_128K:
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case CHIPID_CIDR_NVPSIZ_256K:
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case CHIPID_CIDR_NVPSIZ_512K:
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if (offset)
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*offset = addr - 0x400000;
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return SAM4S_EEFC_BASE(0);
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case CHIPID_CIDR_NVPSIZ_1024K:
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half = 0x480000;
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break;
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case CHIPID_CIDR_NVPSIZ_2048K:
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half = 0x500000;
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break;
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}
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if (addr >= half) {
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if (offset)
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*offset = addr - half;
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return SAM4S_EEFC_BASE(1);
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} else {
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if (offset)
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*offset = addr - 0x400000;
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return SAM4S_EEFC_BASE(0);
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}
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}
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/* SAM3N device */
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if (offset)
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*offset = addr - 0x400000;
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@ -211,10 +272,16 @@ sam3x_flash_base(struct target_s *target, uint32_t addr, uint32_t *offset)
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static int sam3x_flash_erase(struct target_s *target, uint32_t addr, int len)
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{
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unsigned page_size;
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if (strcmp(target->driver, "Atmel SAM4S") == 0) {
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page_size = SAM4_PAGE_SIZE;
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} else {
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page_size = SAM3_PAGE_SIZE;
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}
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uint32_t offset;
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uint32_t base = sam3x_flash_base(target, addr, &offset);
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unsigned chunk = offset / PAGE_SIZE;
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uint8_t buf[PAGE_SIZE];
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unsigned chunk = offset / page_size;
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uint8_t buf[page_size];
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/* This device doesn't really have a page erase function.
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* This Erase/Write page is the best we have, so we write with all
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@ -223,14 +290,14 @@ static int sam3x_flash_erase(struct target_s *target, uint32_t addr, int len)
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memset(buf, 0xff, sizeof(buf));
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/* Only do this once, since it doesn't change. */
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target_mem_write_words(target, addr, (void*)buf, PAGE_SIZE);
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target_mem_write_words(target, addr, (void*)buf, page_size);
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while (len) {
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if(sam3x_flash_cmd(target, base, EEFC_FCR_FCMD_EWP, chunk))
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return -1;
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len -= PAGE_SIZE;
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addr += PAGE_SIZE;
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len -= page_size;
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addr += page_size;
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chunk++;
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}
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@ -240,12 +307,18 @@ static int sam3x_flash_erase(struct target_s *target, uint32_t addr, int len)
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static int sam3x_flash_write(struct target_s *target, uint32_t dest,
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const uint8_t *src, int len)
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{
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unsigned page_size;
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if (strcmp(target->driver, "Atmel SAM4S") == 0) {
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page_size = SAM4_PAGE_SIZE;
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} else {
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page_size = SAM3_PAGE_SIZE;
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}
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uint32_t offset;
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uint32_t base = sam3x_flash_base(target, dest, &offset);
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uint8_t buf[PAGE_SIZE];
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unsigned first_chunk = offset / PAGE_SIZE;
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unsigned last_chunk = (offset + len - 1) / PAGE_SIZE;
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offset %= PAGE_SIZE;
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uint8_t buf[page_size];
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unsigned first_chunk = offset / page_size;
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unsigned last_chunk = (offset + len - 1) / page_size;
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offset %= page_size;
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dest -= offset;
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for (unsigned chunk = first_chunk; chunk <= last_chunk; chunk++) {
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@ -258,7 +331,7 @@ static int sam3x_flash_write(struct target_s *target, uint32_t dest,
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memset(buf, 0xff, sizeof(buf));
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/* copy as much as fits */
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int copylen = PAGE_SIZE - offset;
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int copylen = page_size - offset;
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if (copylen > len)
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copylen = len;
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memcpy(&buf[offset], src, copylen);
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@ -270,12 +343,12 @@ static int sam3x_flash_write(struct target_s *target, uint32_t dest,
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} else {
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/* interior chunk, must be aligned and full-sized */
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memcpy(buf, src, PAGE_SIZE);
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len -= PAGE_SIZE;
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src += PAGE_SIZE;
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memcpy(buf, src, page_size);
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len -= page_size;
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src += page_size;
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}
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target_mem_write_words(target, dest, (void*)buf, PAGE_SIZE);
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target_mem_write_words(target, dest, (void*)buf, page_size);
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if(sam3x_flash_cmd(target, base, EEFC_FCR_FCMD_WP, chunk))
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return -1;
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}
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