native: Implemented platform support for tristating the TCLK/SWCLK pin
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@ -50,4 +50,6 @@ void platform_request_boot(void);
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void platform_max_frequency_set(uint32_t frequency);
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uint32_t platform_max_frequency_get(void);
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void platform_target_clk_output_enable(bool enable);
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#endif
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@ -149,6 +149,8 @@ void platform_init(void)
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rcc_periph_clock_enable(RCC_USB);
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rcc_periph_clock_enable(RCC_GPIOA);
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rcc_periph_clock_enable(RCC_GPIOB);
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if (platform_hwversion() >= 6)
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rcc_periph_clock_enable(RCC_GPIOC);
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rcc_periph_clock_enable(RCC_AFIO);
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rcc_periph_clock_enable(RCC_CRC);
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@ -173,6 +175,12 @@ void platform_init(void)
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gpio_port_write(GPIOA, 0x8182);
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gpio_port_write(GPIOB, 0x2002);
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if (platform_hwversion() >= 6) {
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gpio_set_mode(TCK_DIR_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, TCK_DIR_PIN);
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gpio_set_mode(TCK_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, TCK_PIN);
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gpio_clear(TCK_DIR_PORT, TCK_DIR_PIN);
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}
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gpio_set_mode(LED_PORT, GPIO_MODE_OUTPUT_2_MHZ,
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GPIO_CNF_OUTPUT_PUSHPULL,
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LED_UART | LED_IDLE_RUN | LED_ERROR);
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@ -347,6 +355,12 @@ void platform_request_boot(void)
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gpio_clear(GPIOB, GPIO12);
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}
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void platform_target_clk_output_enable(bool enable)
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{
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if (platform_hwversion() >= 6)
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gpio_set_val(TCK_DIR_PORT, TCK_DIR_PIN, enable);
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}
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void exti15_10_isr(void)
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{
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uint32_t usb_vbus_port;
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@ -64,6 +64,7 @@ int usbuart_debug_write(const char *buf, size_t len);
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* = PA7 (output) -- Hardware 6 and newer
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* TMS = PA4 (input/output for SWDIO)
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* TCK = PA5 (output SWCLK)
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* TCK_DIR = PC15 (output) -- Hardware 6 and newer
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* TDO = PA6 (input)
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* TRACESWO = PB7 (input) -- To allow trace decoding using USART1
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* Hardware 4 has a normally open jumper between TDO and TRACESWO
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@ -110,11 +111,13 @@ int usbuart_debug_write(const char *buf, size_t len);
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#define TMS_DIR_PORT JTAG_PORT
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#define TMS_PORT JTAG_PORT
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#define TCK_PORT JTAG_PORT
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#define TCK_DIR_PORT GPIOC
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#define TDO_PORT JTAG_PORT
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#define TDI_PIN HW_SWITCH(6, GPIO3, GPIO7)
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#define TMS_DIR_PIN GPIO1
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#define TMS_PIN GPIO4
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#define TCK_PIN GPIO5
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#define TCK_DIR_PIN GPIO15
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#define TDO_PIN GPIO6
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#define SWDIO_DIR_PORT JTAG_PORT
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