native: Implemented platform support for tristating the TCLK/SWCLK pin

This commit is contained in:
dragonmux 2022-08-08 23:58:00 +01:00 committed by Piotr Esden-Tempski
parent b70b807a4e
commit adcfe22f86
3 changed files with 19 additions and 0 deletions

View File

@ -50,4 +50,6 @@ void platform_request_boot(void);
void platform_max_frequency_set(uint32_t frequency);
uint32_t platform_max_frequency_get(void);
void platform_target_clk_output_enable(bool enable);
#endif

View File

@ -149,6 +149,8 @@ void platform_init(void)
rcc_periph_clock_enable(RCC_USB);
rcc_periph_clock_enable(RCC_GPIOA);
rcc_periph_clock_enable(RCC_GPIOB);
if (platform_hwversion() >= 6)
rcc_periph_clock_enable(RCC_GPIOC);
rcc_periph_clock_enable(RCC_AFIO);
rcc_periph_clock_enable(RCC_CRC);
@ -173,6 +175,12 @@ void platform_init(void)
gpio_port_write(GPIOA, 0x8182);
gpio_port_write(GPIOB, 0x2002);
if (platform_hwversion() >= 6) {
gpio_set_mode(TCK_DIR_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, TCK_DIR_PIN);
gpio_set_mode(TCK_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, TCK_PIN);
gpio_clear(TCK_DIR_PORT, TCK_DIR_PIN);
}
gpio_set_mode(LED_PORT, GPIO_MODE_OUTPUT_2_MHZ,
GPIO_CNF_OUTPUT_PUSHPULL,
LED_UART | LED_IDLE_RUN | LED_ERROR);
@ -347,6 +355,12 @@ void platform_request_boot(void)
gpio_clear(GPIOB, GPIO12);
}
void platform_target_clk_output_enable(bool enable)
{
if (platform_hwversion() >= 6)
gpio_set_val(TCK_DIR_PORT, TCK_DIR_PIN, enable);
}
void exti15_10_isr(void)
{
uint32_t usb_vbus_port;

View File

@ -64,6 +64,7 @@ int usbuart_debug_write(const char *buf, size_t len);
* = PA7 (output) -- Hardware 6 and newer
* TMS = PA4 (input/output for SWDIO)
* TCK = PA5 (output SWCLK)
* TCK_DIR = PC15 (output) -- Hardware 6 and newer
* TDO = PA6 (input)
* TRACESWO = PB7 (input) -- To allow trace decoding using USART1
* Hardware 4 has a normally open jumper between TDO and TRACESWO
@ -110,11 +111,13 @@ int usbuart_debug_write(const char *buf, size_t len);
#define TMS_DIR_PORT JTAG_PORT
#define TMS_PORT JTAG_PORT
#define TCK_PORT JTAG_PORT
#define TCK_DIR_PORT GPIOC
#define TDO_PORT JTAG_PORT
#define TDI_PIN HW_SWITCH(6, GPIO3, GPIO7)
#define TMS_DIR_PIN GPIO1
#define TMS_PIN GPIO4
#define TCK_PIN GPIO5
#define TCK_DIR_PIN GPIO15
#define TDO_PIN GPIO6
#define SWDIO_DIR_PORT JTAG_PORT