adiv5: Fixed the naming of a timeout in cortexm_prepare
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013b2dee60
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@ -428,14 +428,14 @@ static bool cortexm_prepare(ADIv5_AP_t *ap)
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ap->ap_cortexm_demcr = adiv5_mem_read32(ap, CORTEXM_DEMCR);
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ap->ap_cortexm_demcr = adiv5_mem_read32(ap, CORTEXM_DEMCR);
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const uint32_t demcr = CORTEXM_DEMCR_TRCENA | CORTEXM_DEMCR_VC_HARDERR | CORTEXM_DEMCR_VC_CORERESET;
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const uint32_t demcr = CORTEXM_DEMCR_TRCENA | CORTEXM_DEMCR_VC_HARDERR | CORTEXM_DEMCR_VC_CORERESET;
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adiv5_mem_write(ap, CORTEXM_DEMCR, &demcr, sizeof(demcr));
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adiv5_mem_write(ap, CORTEXM_DEMCR, &demcr, sizeof(demcr));
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platform_timeout to;
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platform_timeout reset_timeout;
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platform_timeout_set(&to, cortexm_wait_timeout);
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platform_timeout_set(&reset_timeout, cortexm_wait_timeout);
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platform_nrst_set_val(false);
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platform_nrst_set_val(false);
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while (1) {
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while (1) {
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dhcsr = adiv5_mem_read32(ap, CORTEXM_DHCSR);
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dhcsr = adiv5_mem_read32(ap, CORTEXM_DHCSR);
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if (!(dhcsr & CORTEXM_DHCSR_S_RESET_ST))
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if (!(dhcsr & CORTEXM_DHCSR_S_RESET_ST))
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break;
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break;
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if (platform_timeout_is_expired(&to)) {
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if (platform_timeout_is_expired(&reset_timeout)) {
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DEBUG_WARN("Error releasing from reset\n");
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DEBUG_WARN("Error releasing from reset\n");
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return false;
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return false;
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}
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}
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