Clean up PLATFORM_HAS_DEBUG

Use only for firmware platforms.

src/platforms/libftdi/platform.h

@@ -36,8 +36,6 @@
 #define FT2232_VID	0x0403
 #define FT2232_PID	0x6010
 
-#define PLATFORM_HAS_DEBUG
-
 #define PLATFORM_IDENT() "FTDI/MPSSE"
 #define SET_RUN_STATE(state)
 #define SET_IDLE_STATE(state)

src/platforms/pc-hosted/platform.h

@@ -32,7 +32,6 @@
 #	endif
 #endif
 
-#define PLATFORM_HAS_DEBUG
 #define PLATFORM_HAS_POWER_SWITCH
 #define PLATFORM_MAX_MSG_SIZE (256)
 #define PLATFORM_IDENT() "PC-HOSTED"

src/platforms/pc-stlinkv2/platform.h

@@ -33,8 +33,6 @@
 #	endif
 #endif
 
-#define PLATFORM_HAS_DEBUG
-
 #define PLATFORM_IDENT() "StlinkV2/3"
 #define SET_RUN_STATE(state)
 void stlink_check_detach(int state);

src/target/adiv5.c

@@ -74,7 +74,7 @@ enum cid_class {
 	cidc_unknown = 0x10
 };
 
-#ifdef PLATFORM_HAS_DEBUG
+#ifdef ENABLE_DEBUG
 /* The reserved ones only have an R in them, to save a bit of space. */
 static const char * const cidc_debug_strings[] =
 {
@@ -111,7 +111,7 @@ enum arm_arch {
 	aa_end
 };
 
-#ifdef PLATFORM_HAS_DEBUG
+#ifdef ENABLE_DEBUG
 #define PIDR_PN_BIT_STRINGS(...) __VA_ARGS__
 #else
 #define PIDR_PN_BIT_STRINGS(...)
@@ -155,7 +155,7 @@ static const struct {
 	uint16_t part_number;
 	enum arm_arch arch;
 	enum cid_class cidc;
-#ifdef PLATFORM_HAS_DEBUG
+#ifdef ENABLE_DEBUG
 	const char *type;
 	const char *full;
 #endif
@@ -277,7 +277,7 @@ static bool adiv5_component_probe(ADIv5_AP_t *ap, uint32_t addr, int recursion,
 	uint64_t pidr = adiv5_ap_read_pidr(ap, addr);
 	uint32_t cidr = adiv5_ap_read_id(ap, addr + CIDR0_OFFSET);
 	bool res = false;
-#if defined(ENABLE_DEBUG) && defined(PLATFORM_HAS_DEBUG)
+#if defined(ENABLE_DEBUG)
 	char indent[recursion + 1];
 
 	for(int i = 0; i < recursion; i++) indent[i] = ' ';
@@ -303,7 +303,7 @@ static bool adiv5_component_probe(ADIv5_AP_t *ap, uint32_t addr, int recursion,
 	/* ROM table */
 	if (cid_class == cidc_romtab) {
 		/* Check SYSMEM bit */
-#if defined(ENABLE_DEBUG) && defined(PLATFORM_HAS_DEBUG)
+#if defined(ENABLE_DEBUG)
 		uint32_t memtype = adiv5_mem_read32(ap, addr | ADIV5_ROM_MEMTYPE) &
 			ADIV5_ROM_MEMTYPE_SYSMEM;
 

src/target/efm32.c

@@ -720,7 +720,7 @@ static int efm32_flash_write(struct target_flash *f,
 	int ret = cortexm_run_stub(t, SRAM_BASE, dest, STUB_BUFFER_BASE, len,
 							   device->msc_addr);
 
-#ifdef PLATFORM_HAS_DEBUG
+#ifdef ENABLE_DEBUG
 	/* Check the MSC_IF */
 	uint32_t msc = device->msc_addr;
 	uint32_t msc_if = target_mem_read32(t, EFM32_MSC_IF(msc));