Clean up PLATFORM_HAS_DEBUG
Use only for firmware platforms.
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9a46c6fd25
commit
c3d509e6c0
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@ -36,8 +36,6 @@
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#define FT2232_VID 0x0403
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#define FT2232_VID 0x0403
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#define FT2232_PID 0x6010
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#define FT2232_PID 0x6010
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#define PLATFORM_HAS_DEBUG
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#define PLATFORM_IDENT() "FTDI/MPSSE"
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#define PLATFORM_IDENT() "FTDI/MPSSE"
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#define SET_RUN_STATE(state)
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#define SET_RUN_STATE(state)
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#define SET_IDLE_STATE(state)
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#define SET_IDLE_STATE(state)
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@ -32,7 +32,6 @@
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# endif
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# endif
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#endif
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#endif
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#define PLATFORM_HAS_DEBUG
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#define PLATFORM_HAS_POWER_SWITCH
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#define PLATFORM_HAS_POWER_SWITCH
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#define PLATFORM_MAX_MSG_SIZE (256)
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#define PLATFORM_MAX_MSG_SIZE (256)
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#define PLATFORM_IDENT() "PC-HOSTED"
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#define PLATFORM_IDENT() "PC-HOSTED"
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@ -33,8 +33,6 @@
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# endif
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# endif
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#endif
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#endif
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#define PLATFORM_HAS_DEBUG
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#define PLATFORM_IDENT() "StlinkV2/3"
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#define PLATFORM_IDENT() "StlinkV2/3"
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#define SET_RUN_STATE(state)
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#define SET_RUN_STATE(state)
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void stlink_check_detach(int state);
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void stlink_check_detach(int state);
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@ -74,7 +74,7 @@ enum cid_class {
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cidc_unknown = 0x10
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cidc_unknown = 0x10
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};
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};
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#ifdef PLATFORM_HAS_DEBUG
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#ifdef ENABLE_DEBUG
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/* The reserved ones only have an R in them, to save a bit of space. */
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/* The reserved ones only have an R in them, to save a bit of space. */
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static const char * const cidc_debug_strings[] =
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static const char * const cidc_debug_strings[] =
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{
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{
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@ -111,7 +111,7 @@ enum arm_arch {
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aa_end
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aa_end
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};
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};
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#ifdef PLATFORM_HAS_DEBUG
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#ifdef ENABLE_DEBUG
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#define PIDR_PN_BIT_STRINGS(...) __VA_ARGS__
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#define PIDR_PN_BIT_STRINGS(...) __VA_ARGS__
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#else
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#else
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#define PIDR_PN_BIT_STRINGS(...)
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#define PIDR_PN_BIT_STRINGS(...)
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@ -155,7 +155,7 @@ static const struct {
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uint16_t part_number;
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uint16_t part_number;
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enum arm_arch arch;
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enum arm_arch arch;
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enum cid_class cidc;
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enum cid_class cidc;
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#ifdef PLATFORM_HAS_DEBUG
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#ifdef ENABLE_DEBUG
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const char *type;
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const char *type;
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const char *full;
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const char *full;
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#endif
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#endif
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@ -277,7 +277,7 @@ static bool adiv5_component_probe(ADIv5_AP_t *ap, uint32_t addr, int recursion,
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uint64_t pidr = adiv5_ap_read_pidr(ap, addr);
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uint64_t pidr = adiv5_ap_read_pidr(ap, addr);
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uint32_t cidr = adiv5_ap_read_id(ap, addr + CIDR0_OFFSET);
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uint32_t cidr = adiv5_ap_read_id(ap, addr + CIDR0_OFFSET);
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bool res = false;
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bool res = false;
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#if defined(ENABLE_DEBUG) && defined(PLATFORM_HAS_DEBUG)
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#if defined(ENABLE_DEBUG)
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char indent[recursion + 1];
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char indent[recursion + 1];
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for(int i = 0; i < recursion; i++) indent[i] = ' ';
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for(int i = 0; i < recursion; i++) indent[i] = ' ';
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@ -303,7 +303,7 @@ static bool adiv5_component_probe(ADIv5_AP_t *ap, uint32_t addr, int recursion,
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/* ROM table */
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/* ROM table */
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if (cid_class == cidc_romtab) {
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if (cid_class == cidc_romtab) {
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/* Check SYSMEM bit */
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/* Check SYSMEM bit */
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#if defined(ENABLE_DEBUG) && defined(PLATFORM_HAS_DEBUG)
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#if defined(ENABLE_DEBUG)
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uint32_t memtype = adiv5_mem_read32(ap, addr | ADIV5_ROM_MEMTYPE) &
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uint32_t memtype = adiv5_mem_read32(ap, addr | ADIV5_ROM_MEMTYPE) &
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ADIV5_ROM_MEMTYPE_SYSMEM;
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ADIV5_ROM_MEMTYPE_SYSMEM;
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@ -720,7 +720,7 @@ static int efm32_flash_write(struct target_flash *f,
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int ret = cortexm_run_stub(t, SRAM_BASE, dest, STUB_BUFFER_BASE, len,
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int ret = cortexm_run_stub(t, SRAM_BASE, dest, STUB_BUFFER_BASE, len,
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device->msc_addr);
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device->msc_addr);
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#ifdef PLATFORM_HAS_DEBUG
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#ifdef ENABLE_DEBUG
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/* Check the MSC_IF */
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/* Check the MSC_IF */
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uint32_t msc = device->msc_addr;
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uint32_t msc = device->msc_addr;
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uint32_t msc_if = target_mem_read32(t, EFM32_MSC_IF(msc));
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uint32_t msc_if = target_mem_read32(t, EFM32_MSC_IF(msc));
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