Remove abstraction of adiv5_dp_write. Both implementations were identical.
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2bf54f9a72
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@ -70,6 +70,11 @@ void adiv5_ap_unref(ADIv5_AP_t *ap)
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}
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}
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void adiv5_dp_write(ADIv5_DP_t *dp, uint16_t addr, uint32_t value)
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{
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dp->low_access(dp, ADIV5_LOW_WRITE, addr, value);
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}
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void adiv5_dp_init(ADIv5_DP_t *dp)
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{
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uint32_t ctrlstat;
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@ -36,7 +36,6 @@
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#define IR_DPACC 0xA
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#define IR_APACC 0xB
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static void adiv5_jtagdp_write(ADIv5_DP_t *dp, uint16_t addr, uint32_t value);
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static uint32_t adiv5_jtagdp_read(ADIv5_DP_t *dp, uint16_t addr);
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static uint32_t adiv5_jtagdp_error(ADIv5_DP_t *dp);
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@ -52,7 +51,6 @@ void adiv5_jtag_dp_handler(jtag_dev_t *dev)
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dp->dev = dev;
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dp->idcode = dev->idcode;
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dp->dp_write = adiv5_jtagdp_write;
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dp->dp_read = adiv5_jtagdp_read;
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dp->error = adiv5_jtagdp_error;
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dp->low_access = adiv5_jtagdp_low_access;
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@ -60,11 +58,6 @@ void adiv5_jtag_dp_handler(jtag_dev_t *dev)
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adiv5_dp_init(dp);
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}
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static void adiv5_jtagdp_write(ADIv5_DP_t *dp, uint16_t addr, uint32_t value)
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{
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adiv5_jtagdp_low_access(dp, ADIV5_LOW_WRITE, addr, value);
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}
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static uint32_t adiv5_jtagdp_read(ADIv5_DP_t *dp, uint16_t addr)
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{
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adiv5_jtagdp_low_access(dp, ADIV5_LOW_READ, addr, 0);
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@ -33,7 +33,6 @@
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#define SWDP_ACK_WAIT 0x02
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#define SWDP_ACK_FAULT 0x04
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static void adiv5_swdp_write(ADIv5_DP_t *dp, uint16_t addr, uint32_t value);
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static uint32_t adiv5_swdp_read(ADIv5_DP_t *dp, uint16_t addr);
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static uint32_t adiv5_swdp_error(ADIv5_DP_t *dp);
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@ -64,7 +63,6 @@ int adiv5_swdp_scan(void)
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return -1;
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}
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dp->dp_write = adiv5_swdp_write;
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dp->dp_read = adiv5_swdp_read;
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dp->error = adiv5_swdp_error;
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dp->low_access = adiv5_swdp_low_access;
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@ -78,11 +76,6 @@ int adiv5_swdp_scan(void)
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return target_list?1:0;
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}
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static void adiv5_swdp_write(ADIv5_DP_t *dp, uint16_t addr, uint32_t value)
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{
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adiv5_swdp_low_access(dp, ADIV5_LOW_WRITE, addr, value);
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}
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static uint32_t adiv5_swdp_read(ADIv5_DP_t *dp, uint16_t addr)
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{
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if (addr & ADIV5_APnDP) {
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@ -111,7 +104,7 @@ static uint32_t adiv5_swdp_error(ADIv5_DP_t *dp)
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if(err & ADIV5_DP_CTRLSTAT_WDATAERR)
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clr |= ADIV5_DP_ABORT_WDERRCLR;
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adiv5_swdp_write(dp, ADIV5_DP_ABORT, clr);
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adiv5_dp_write(dp, ADIV5_DP_ABORT, clr);
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dp->fault = 0;
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return err;
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@ -109,7 +109,6 @@ typedef struct ADIv5_DP_s {
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bool allow_timeout;
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void (*dp_write)(struct ADIv5_DP_s *dp, uint16_t addr, uint32_t value);
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uint32_t (*dp_read)(struct ADIv5_DP_s *dp, uint16_t addr);
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uint32_t (*error)(struct ADIv5_DP_s *dp);
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@ -123,11 +122,6 @@ typedef struct ADIv5_DP_s {
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};
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} ADIv5_DP_t;
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static inline void adiv5_dp_write(ADIv5_DP_t *dp, uint16_t addr, uint32_t value)
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{
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dp->dp_write(dp, addr, value);
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}
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static inline uint32_t adiv5_dp_read(ADIv5_DP_t *dp, uint16_t addr)
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{
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return dp->dp_read(dp, addr);
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@ -160,6 +154,7 @@ typedef struct ADIv5_AP_s {
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} ADIv5_AP_t;
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void adiv5_dp_init(ADIv5_DP_t *dp);
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void adiv5_dp_write(ADIv5_DP_t *dp, uint16_t addr, uint32_t value);
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void adiv5_dp_ref(ADIv5_DP_t *dp);
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void adiv5_ap_ref(ADIv5_AP_t *ap);
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